Commit bda7f4ee authored by Devin Heitmueller's avatar Devin Heitmueller Committed by Mauro Carvalho Chehab
Browse files

[media] s5h1432: fix codingstyle issues 



Run Lindent and fix a few spacing issues.

This patch makes no functional change to the driver.

Signed-off-by: default avatarDevin Heitmueller <dheitmueller@hauppauge.com>
Signed-off-by: default avatarMauro Carvalho Chehab <mchehab@redhat.com>
parent 9dfde557

drivers/media/dvb/frontends/s5h1432.c

+149 −167
Original line number Diff line number Diff line
@@ -53,7 +53,6 @@ static int debug; 
		printk(arg);	\

	} while (0)





static int s5h1432_writereg(struct s5h1432_state *state,

			    u8 addr, u8 reg, u8 data)

{
@@ -79,7 +78,8 @@ static u8 s5h1432_readreg(struct s5h1432_state *state, u8 addr, u8 reg) 


	struct i2c_msg msg[] = {

		{.addr = addr, .flags = 0, .buf = b0, .len = 1},

		{ .addr = addr, .flags = I2C_M_RD, .buf = b1, .len = 1 } };

		{.addr = addr, .flags = I2C_M_RD, .buf = b1, .len = 1}

	};



	ret = i2c_transfer(state->i2c, msg, 2);
@@ -94,14 +94,13 @@ static int s5h1432_sleep(struct dvb_frontend *fe) 
	return 0;

}



static int s5h1432_set_channel_bandwidth(struct dvb_frontend *fe, u32 bandwidth)

static int s5h1432_set_channel_bandwidth(struct dvb_frontend *fe,

					 u32 bandwidth)

{



	struct s5h1432_state *state = fe->demodulator_priv;



	u8 reg = 0;





	/* Register [0x2E] bit 3:2 : 8MHz = 0; 7MHz = 1; 6MHz = 2 */

	reg = s5h1432_readreg(state, S5H1432_I2C_TOP_ADDR, 0x2E);

	reg &= ~(0x0C);
@@ -124,58 +123,46 @@ static int s5h1432_set_channel_bandwidth(struct dvb_frontend *fe, u32 bandwidth) 


static int s5h1432_set_IF(struct dvb_frontend *fe, u32 ifFreqHz)

{



	struct s5h1432_state *state = fe->demodulator_priv;



	switch (ifFreqHz) {

	case TAIWAN_HI_IF_FREQ_44_MHZ:

		{

		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe4, 0x55);

		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe5, 0x55);

		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe7, 0x15);

		break;

		}

	case EUROPE_HI_IF_FREQ_36_MHZ:

		{

		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe4, 0x00);

		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe5, 0x00);

		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe7, 0x40);

		break;

		}

	case IF_FREQ_6_MHZ:

		{

		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe4, 0x00);

		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe5, 0x00);

		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe7, 0xe0);

		break;

		}

	case IF_FREQ_3point3_MHZ:

		{

		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe4, 0x66);

		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe5, 0x66);

		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe7, 0xEE);

		break;

		}

	case IF_FREQ_3point5_MHZ:

		{

		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe4, 0x55);

		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe5, 0x55);

		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe7, 0xED);

		break;

		}

	case IF_FREQ_4_MHZ:

		{

		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe4, 0xAA);

		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe5, 0xAA);

		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe7, 0xEA);

		break;

		}

	default:

		{

			u32 value = 0;

			value = (u32) (((48000 - (ifFreqHz / 1000)) * 512 *

					(u32) 32768) / (48 * 1000));

		printk(KERN_INFO "Default IFFreq %d :reg value = 0x%x \n",

			printk(KERN_INFO

			       "Default IFFreq %d :reg value = 0x%x \n",

			       ifFreqHz, value);

			s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0xe4,

					 (u8) value & 0xFF);
@@ -202,7 +189,8 @@ static int s5h1432_set_frontend(struct dvb_frontend *fe, 
		/*current_frequency = p->frequency; */

		/*state->current_frequency = p->frequency; */

	} else {

		fe->ops.tuner_ops.set_params(fe, p); msleep(300);

		fe->ops.tuner_ops.set_params(fe, p);

		msleep(300);

		s5h1432_set_channel_bandwidth(fe, dvb_bandwidth);

		switch (p->u.ofdm.bandwidth) {

		case BANDWIDTH_6_MHZ:
@@ -227,7 +215,6 @@ static int s5h1432_set_frontend(struct dvb_frontend *fe, 
		msleep(30);

		s5h1432_writereg(state, S5H1432_I2C_TOP_ADDR, 0x09, 0x1b);





		s5h1432_set_channel_bandwidth(fe, dvb_bandwidth);

		switch (p->u.ofdm.bandwidth) {

		case BANDWIDTH_6_MHZ:
@@ -259,7 +246,6 @@ static int s5h1432_set_frontend(struct dvb_frontend *fe, 
	return 0;

}





static int s5h1432_init(struct dvb_frontend *fe)

{

	struct s5h1432_state *state = fe->demodulator_priv;
@@ -268,7 +254,6 @@ static int s5h1432_init(struct dvb_frontend *fe) 
	state->current_frequency = 0;

	printk(KERN_INFO " s5h1432_init().\n");





	/*Set VSB mode as default, this also does a soft reset */

	/*Initialize registers */
@@ -318,14 +303,11 @@ static int s5h1432_init(struct dvb_frontend *fe) 
	return 0;

}





static int s5h1432_read_status(struct dvb_frontend *fe, fe_status_t *status)

{

	return 0;

}







static int s5h1432_read_signal_strength(struct dvb_frontend *fe,

					u16 *signal_strength)

{
@@ -397,6 +379,7 @@ struct dvb_frontend *s5h1432_attach(const struct s5h1432_config *config, 
	kfree(state);

	return NULL;

}



EXPORT_SYMBOL(s5h1432_attach);



static struct dvb_frontend_ops s5h1432_ops = {
@@ -411,8 +394,7 @@ static struct dvb_frontend_ops s5h1432_ops = { 
		 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |

		 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |

		 FE_CAN_HIERARCHY_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |

		FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER

	},

		 FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER},



	.init = s5h1432_init,

	.sleep = s5h1432_sleep,

drivers/media/dvb/frontends/s5h1432.h

+3 −3
Original line number Diff line number Diff line
@@ -79,8 +79,8 @@ struct s5h1432_config { 
extern struct dvb_frontend *s5h1432_attach(const struct s5h1432_config *config,

					   struct i2c_adapter *i2c);

#else

static inline struct dvb_frontend *s5h1432_attach(

	const struct s5h1432_config *config,

static inline struct dvb_frontend *s5h1432_attach(const struct s5h1432_config

						  *config,

						  struct i2c_adapter *i2c)

{

	printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);