Commit baec651f authored by Wenjing Liu's avatar Wenjing Liu Committed by Alex Deucher
Browse files

drm/amd/display: write all 4 bytes of FFE_PRESET dpcd value



[why]
According to specs, it expects us to write all 4 bytes even if
current lane count is less than 4.

Reviewed-by: default avatarGeorge Shen <George.Shen@amd.com>
Acked-by: default avatarHamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: default avatarWenjing Liu <wenjing.liu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent b808a7eb
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+18 −19
Original line number Diff line number Diff line
@@ -944,6 +944,23 @@ enum dc_status dp_get_lane_status_and_lane_adjust(
	return status;
}

static enum dc_status dpcd_128b_132b_set_lane_settings(
		struct dc_link *link,
		const struct link_training_settings *link_training_setting)
{
	enum dc_status status = core_link_write_dpcd(link,
			DP_TRAINING_LANE0_SET,
			(uint8_t *)(link_training_setting->dpcd_lane_settings),
			sizeof(link_training_setting->dpcd_lane_settings));

	DC_LOG_HW_LINK_TRAINING("%s:\n 0x%X TX_FFE_PRESET_VALUE = %x\n",
			__func__,
			DP_TRAINING_LANE0_SET,
			link_training_setting->dpcd_lane_settings[0].tx_ffe.PRESET_VALUE);
	return status;
}


enum dc_status dpcd_set_lane_settings(
	struct dc_link *link,
	const struct link_training_settings *link_training_setting,
@@ -964,16 +981,6 @@ enum dc_status dpcd_set_lane_settings(
		link_training_setting->link_settings.lane_count);

	if (is_repeater(link_training_setting, offset)) {
		if (dp_get_link_encoding_format(&link_training_setting->link_settings) ==
				DP_128b_132b_ENCODING)
			DC_LOG_HW_LINK_TRAINING("%s:\n LTTPR Repeater ID: %d\n"
					" 0x%X TX_FFE_PRESET_VALUE = %x\n",
					__func__,
					offset,
					lane0_set_address,
					link_training_setting->dpcd_lane_settings[0].tx_ffe.PRESET_VALUE);
		else if (dp_get_link_encoding_format(&link_training_setting->link_settings) ==
				DP_8b_10b_ENCODING)
		DC_LOG_HW_LINK_TRAINING("%s\n LTTPR Repeater ID: %d\n"
				" 0x%X VS set = %x  PE set = %x max VS Reached = %x  max PE Reached = %x\n",
			__func__,
@@ -985,14 +992,6 @@ enum dc_status dpcd_set_lane_settings(
			link_training_setting->dpcd_lane_settings[0].bits.MAX_PRE_EMPHASIS_REACHED);

	} else {
		if (dp_get_link_encoding_format(&link_training_setting->link_settings) ==
				DP_128b_132b_ENCODING)
			DC_LOG_HW_LINK_TRAINING("%s:\n 0x%X TX_FFE_PRESET_VALUE = %x\n",
					__func__,
					lane0_set_address,
					link_training_setting->dpcd_lane_settings[0].tx_ffe.PRESET_VALUE);
		else if (dp_get_link_encoding_format(&link_training_setting->link_settings) ==
				DP_8b_10b_ENCODING)
		DC_LOG_HW_LINK_TRAINING("%s\n 0x%X VS set = %x  PE set = %x max VS Reached = %x  max PE Reached = %x\n",
			__func__,
			lane0_set_address,
@@ -2023,7 +2022,7 @@ static enum link_training_result dp_perform_128b_132b_channel_eq_done_sequence(
			result = DP_128b_132b_LT_FAILED;
		} else {
			dp_set_hw_lane_settings(link, link_res, lt_settings, DPRX);
			dpcd_set_lane_settings(link, lt_settings, DPRX);
			dpcd_128b_132b_set_lane_settings(link, lt_settings);
		}
		loop_count++;
	}