Loading drivers/staging/et131x/et1310_address_map.h +9 −23 Original line number Diff line number Diff line Loading @@ -830,29 +830,15 @@ typedef union _RXMAC_UNI_PF_ADDR3_t { /* * structure for Packet Filter Control reg in rxmac address map * located at address 0x4084 * * 31-23: unused * 22-16: min_pkt_size * 15-4: unused * 3: filter_frag_en * 2: filter_uni_en * 1: filter_multi_en * 0: filter_broad_en */ typedef union _RXMAC_PF_CTRL_t { u32 value; struct { #ifdef _BIT_FIELDS_HTOL u32 unused2:9; /* bits 23-31 */ u32 min_pkt_size:7; /* bits 16-22 */ u32 unused1:12; /* bits 4-15 */ u32 filter_frag_en:1; /* bit 3 */ u32 filter_uni_en:1; /* bit 2 */ u32 filter_multi_en:1; /* bit 1 */ u32 filter_broad_en:1; /* bit 0 */ #else u32 filter_broad_en:1; /* bit 0 */ u32 filter_multi_en:1; /* bit 1 */ u32 filter_uni_en:1; /* bit 2 */ u32 filter_frag_en:1; /* bit 3 */ u32 unused1:12; /* bits 4-15 */ u32 min_pkt_size:7; /* bits 16-22 */ u32 unused2:9; /* bits 23-31 */ #endif } bits; } RXMAC_PF_CTRL_t, *PRXMAC_PF_CTRL_t; /* * structure for Memory Controller Interface Control Max Segment reg in rxmac Loading Loading @@ -1017,7 +1003,7 @@ typedef struct _RXMAC_t { /* Location: */ u32 multi_hash2; /* 0x4078 */ u32 multi_hash3; /* 0x407C */ u32 multi_hash4; /* 0x4080 */ RXMAC_PF_CTRL_t pf_ctrl; /* 0x4084 */ u32 pf_ctrl; /* 0x4084 */ RXMAC_MCIF_CTRL_MAX_SEG_t mcif_ctrl_max_seg; /* 0x4088 */ RXMAC_MCIF_WATER_MARK_t mcif_water_mark; /* 0x408C */ RXMAC_RXQ_DIAG_t rxq_diag; /* 0x4090 */ Loading drivers/staging/et131x/et1310_mac.c +8 −10 Original line number Diff line number Diff line Loading @@ -241,7 +241,7 @@ void ConfigRxMacRegs(struct et131x_adapter *etdev) struct _RXMAC_t __iomem *pRxMac = &etdev->regs->rxmac; RXMAC_WOL_SA_LO_t sa_lo; RXMAC_WOL_SA_HI_t sa_hi; RXMAC_PF_CTRL_t pf_ctrl = { 0 }; u32 pf_ctrl = 0; /* Disable the MAC while it is being configured (also disable WOL) */ writel(0x8, &pRxMac->ctrl.value); Loading Loading @@ -292,12 +292,12 @@ void ConfigRxMacRegs(struct et131x_adapter *etdev) writel(sa_hi.value, &pRxMac->sa_hi.value); /* Disable all Packet Filtering */ writel(0, &pRxMac->pf_ctrl.value); writel(0, &pRxMac->pf_ctrl); /* Let's initialize the Unicast Packet filtering address */ if (etdev->PacketFilter & ET131X_PACKET_TYPE_DIRECTED) { SetupDeviceForUnicast(etdev); pf_ctrl.bits.filter_uni_en = 1; pf_ctrl |= 4; /* Unicast filter */ } else { writel(0, &pRxMac->uni_pf_addr1.value); writel(0, &pRxMac->uni_pf_addr2.value); Loading @@ -305,16 +305,14 @@ void ConfigRxMacRegs(struct et131x_adapter *etdev) } /* Let's initialize the Multicast hash */ if (etdev->PacketFilter & ET131X_PACKET_TYPE_ALL_MULTICAST) { pf_ctrl.bits.filter_multi_en = 0; } else { pf_ctrl.bits.filter_multi_en = 1; if (!(etdev->PacketFilter & ET131X_PACKET_TYPE_ALL_MULTICAST)) { pf_ctrl |= 2; /* Multicast filter */ SetupDeviceForMulticast(etdev); } /* Runt packet filtering. Didn't work in version A silicon. */ pf_ctrl.bits.min_pkt_size = NIC_MIN_PACKET_SIZE + 4; pf_ctrl.bits.filter_frag_en = 1; pf_ctrl |= (NIC_MIN_PACKET_SIZE + 4) << 16; pf_ctrl |= 8; /* Fragment filter */ if (etdev->RegistryJumboPacket > 8192) { RXMAC_MCIF_CTRL_MAX_SEG_t mcif_ctrl_max_seg; Loading Loading @@ -370,7 +368,7 @@ void ConfigRxMacRegs(struct et131x_adapter *etdev) * dropping doesn't work, so it is disabled in the pf_ctrl register, * but we still leave the packet filter on. */ writel(pf_ctrl.value, &pRxMac->pf_ctrl.value); writel(pf_ctrl, &pRxMac->pf_ctrl); writel(0x9, &pRxMac->ctrl.value); } Loading drivers/staging/et131x/et131x_netdev.c +16 −18 Original line number Diff line number Diff line Loading @@ -334,6 +334,8 @@ int et131x_ioctl(struct net_device *netdev, struct ifreq *reqbuf, int cmd) * et131x_set_packet_filter - Configures the Rx Packet filtering on the device * @adapter: pointer to our private adapter structure * * FIXME: lot of dups with MAC code * * Returns 0 on success, errno on failure */ int et131x_set_packet_filter(struct et131x_adapter *adapter) Loading @@ -341,10 +343,10 @@ int et131x_set_packet_filter(struct et131x_adapter *adapter) int status = 0; uint32_t filter = adapter->PacketFilter; RXMAC_CTRL_t ctrl; RXMAC_PF_CTRL_t pf_ctrl; u32 pf_ctrl; ctrl.value = readl(&adapter->regs->rxmac.ctrl.value); pf_ctrl.value = readl(&adapter->regs->rxmac.pf_ctrl.value); pf_ctrl = readl(&adapter->regs->rxmac.pf_ctrl); /* Default to disabled packet filtering. Enable it in the individual * case statements that require the device to filter something Loading @@ -354,45 +356,41 @@ int et131x_set_packet_filter(struct et131x_adapter *adapter) /* Set us to be in promiscuous mode so we receive everything, this * is also true when we get a packet filter of 0 */ if ((filter & ET131X_PACKET_TYPE_PROMISCUOUS) || filter == 0) { pf_ctrl.bits.filter_broad_en = 0; pf_ctrl.bits.filter_multi_en = 0; pf_ctrl.bits.filter_uni_en = 0; } else { if ((filter & ET131X_PACKET_TYPE_PROMISCUOUS) || filter == 0) pf_ctrl &= ~7; /* Clear filter bits */ else { /* * Set us up with Multicast packet filtering. Three cases are * possible - (1) we have a multi-cast list, (2) we receive ALL * multicast entries or (3) we receive none. */ if (filter & ET131X_PACKET_TYPE_ALL_MULTICAST) { pf_ctrl.bits.filter_multi_en = 0; } else { if (filter & ET131X_PACKET_TYPE_ALL_MULTICAST) pf_ctrl &= ~2; /* Multicast filter bit */ else { SetupDeviceForMulticast(adapter); pf_ctrl.bits.filter_multi_en = 1; pf_ctrl |= 2; ctrl.bits.pkt_filter_disable = 0; } /* Set us up with Unicast packet filtering */ if (filter & ET131X_PACKET_TYPE_DIRECTED) { SetupDeviceForUnicast(adapter); pf_ctrl.bits.filter_uni_en = 1; pf_ctrl |= 4; ctrl.bits.pkt_filter_disable = 0; } /* Set us up with Broadcast packet filtering */ if (filter & ET131X_PACKET_TYPE_BROADCAST) { pf_ctrl.bits.filter_broad_en = 1; pf_ctrl |= 1; /* Broadcast filter bit */ ctrl.bits.pkt_filter_disable = 0; } else { pf_ctrl.bits.filter_broad_en = 0; } } else pf_ctrl &= ~1; /* Setup the receive mac configuration registers - Packet * Filter control + the enable / disable for packet filter * in the control reg. */ writel(pf_ctrl.value, &adapter->regs->rxmac.pf_ctrl.value); writel(pf_ctrl, &adapter->regs->rxmac.pf_ctrl); writel(ctrl.value, &adapter->regs->rxmac.ctrl.value); } return status; Loading Loading
drivers/staging/et131x/et1310_address_map.h +9 −23 Original line number Diff line number Diff line Loading @@ -830,29 +830,15 @@ typedef union _RXMAC_UNI_PF_ADDR3_t { /* * structure for Packet Filter Control reg in rxmac address map * located at address 0x4084 * * 31-23: unused * 22-16: min_pkt_size * 15-4: unused * 3: filter_frag_en * 2: filter_uni_en * 1: filter_multi_en * 0: filter_broad_en */ typedef union _RXMAC_PF_CTRL_t { u32 value; struct { #ifdef _BIT_FIELDS_HTOL u32 unused2:9; /* bits 23-31 */ u32 min_pkt_size:7; /* bits 16-22 */ u32 unused1:12; /* bits 4-15 */ u32 filter_frag_en:1; /* bit 3 */ u32 filter_uni_en:1; /* bit 2 */ u32 filter_multi_en:1; /* bit 1 */ u32 filter_broad_en:1; /* bit 0 */ #else u32 filter_broad_en:1; /* bit 0 */ u32 filter_multi_en:1; /* bit 1 */ u32 filter_uni_en:1; /* bit 2 */ u32 filter_frag_en:1; /* bit 3 */ u32 unused1:12; /* bits 4-15 */ u32 min_pkt_size:7; /* bits 16-22 */ u32 unused2:9; /* bits 23-31 */ #endif } bits; } RXMAC_PF_CTRL_t, *PRXMAC_PF_CTRL_t; /* * structure for Memory Controller Interface Control Max Segment reg in rxmac Loading Loading @@ -1017,7 +1003,7 @@ typedef struct _RXMAC_t { /* Location: */ u32 multi_hash2; /* 0x4078 */ u32 multi_hash3; /* 0x407C */ u32 multi_hash4; /* 0x4080 */ RXMAC_PF_CTRL_t pf_ctrl; /* 0x4084 */ u32 pf_ctrl; /* 0x4084 */ RXMAC_MCIF_CTRL_MAX_SEG_t mcif_ctrl_max_seg; /* 0x4088 */ RXMAC_MCIF_WATER_MARK_t mcif_water_mark; /* 0x408C */ RXMAC_RXQ_DIAG_t rxq_diag; /* 0x4090 */ Loading
drivers/staging/et131x/et1310_mac.c +8 −10 Original line number Diff line number Diff line Loading @@ -241,7 +241,7 @@ void ConfigRxMacRegs(struct et131x_adapter *etdev) struct _RXMAC_t __iomem *pRxMac = &etdev->regs->rxmac; RXMAC_WOL_SA_LO_t sa_lo; RXMAC_WOL_SA_HI_t sa_hi; RXMAC_PF_CTRL_t pf_ctrl = { 0 }; u32 pf_ctrl = 0; /* Disable the MAC while it is being configured (also disable WOL) */ writel(0x8, &pRxMac->ctrl.value); Loading Loading @@ -292,12 +292,12 @@ void ConfigRxMacRegs(struct et131x_adapter *etdev) writel(sa_hi.value, &pRxMac->sa_hi.value); /* Disable all Packet Filtering */ writel(0, &pRxMac->pf_ctrl.value); writel(0, &pRxMac->pf_ctrl); /* Let's initialize the Unicast Packet filtering address */ if (etdev->PacketFilter & ET131X_PACKET_TYPE_DIRECTED) { SetupDeviceForUnicast(etdev); pf_ctrl.bits.filter_uni_en = 1; pf_ctrl |= 4; /* Unicast filter */ } else { writel(0, &pRxMac->uni_pf_addr1.value); writel(0, &pRxMac->uni_pf_addr2.value); Loading @@ -305,16 +305,14 @@ void ConfigRxMacRegs(struct et131x_adapter *etdev) } /* Let's initialize the Multicast hash */ if (etdev->PacketFilter & ET131X_PACKET_TYPE_ALL_MULTICAST) { pf_ctrl.bits.filter_multi_en = 0; } else { pf_ctrl.bits.filter_multi_en = 1; if (!(etdev->PacketFilter & ET131X_PACKET_TYPE_ALL_MULTICAST)) { pf_ctrl |= 2; /* Multicast filter */ SetupDeviceForMulticast(etdev); } /* Runt packet filtering. Didn't work in version A silicon. */ pf_ctrl.bits.min_pkt_size = NIC_MIN_PACKET_SIZE + 4; pf_ctrl.bits.filter_frag_en = 1; pf_ctrl |= (NIC_MIN_PACKET_SIZE + 4) << 16; pf_ctrl |= 8; /* Fragment filter */ if (etdev->RegistryJumboPacket > 8192) { RXMAC_MCIF_CTRL_MAX_SEG_t mcif_ctrl_max_seg; Loading Loading @@ -370,7 +368,7 @@ void ConfigRxMacRegs(struct et131x_adapter *etdev) * dropping doesn't work, so it is disabled in the pf_ctrl register, * but we still leave the packet filter on. */ writel(pf_ctrl.value, &pRxMac->pf_ctrl.value); writel(pf_ctrl, &pRxMac->pf_ctrl); writel(0x9, &pRxMac->ctrl.value); } Loading
drivers/staging/et131x/et131x_netdev.c +16 −18 Original line number Diff line number Diff line Loading @@ -334,6 +334,8 @@ int et131x_ioctl(struct net_device *netdev, struct ifreq *reqbuf, int cmd) * et131x_set_packet_filter - Configures the Rx Packet filtering on the device * @adapter: pointer to our private adapter structure * * FIXME: lot of dups with MAC code * * Returns 0 on success, errno on failure */ int et131x_set_packet_filter(struct et131x_adapter *adapter) Loading @@ -341,10 +343,10 @@ int et131x_set_packet_filter(struct et131x_adapter *adapter) int status = 0; uint32_t filter = adapter->PacketFilter; RXMAC_CTRL_t ctrl; RXMAC_PF_CTRL_t pf_ctrl; u32 pf_ctrl; ctrl.value = readl(&adapter->regs->rxmac.ctrl.value); pf_ctrl.value = readl(&adapter->regs->rxmac.pf_ctrl.value); pf_ctrl = readl(&adapter->regs->rxmac.pf_ctrl); /* Default to disabled packet filtering. Enable it in the individual * case statements that require the device to filter something Loading @@ -354,45 +356,41 @@ int et131x_set_packet_filter(struct et131x_adapter *adapter) /* Set us to be in promiscuous mode so we receive everything, this * is also true when we get a packet filter of 0 */ if ((filter & ET131X_PACKET_TYPE_PROMISCUOUS) || filter == 0) { pf_ctrl.bits.filter_broad_en = 0; pf_ctrl.bits.filter_multi_en = 0; pf_ctrl.bits.filter_uni_en = 0; } else { if ((filter & ET131X_PACKET_TYPE_PROMISCUOUS) || filter == 0) pf_ctrl &= ~7; /* Clear filter bits */ else { /* * Set us up with Multicast packet filtering. Three cases are * possible - (1) we have a multi-cast list, (2) we receive ALL * multicast entries or (3) we receive none. */ if (filter & ET131X_PACKET_TYPE_ALL_MULTICAST) { pf_ctrl.bits.filter_multi_en = 0; } else { if (filter & ET131X_PACKET_TYPE_ALL_MULTICAST) pf_ctrl &= ~2; /* Multicast filter bit */ else { SetupDeviceForMulticast(adapter); pf_ctrl.bits.filter_multi_en = 1; pf_ctrl |= 2; ctrl.bits.pkt_filter_disable = 0; } /* Set us up with Unicast packet filtering */ if (filter & ET131X_PACKET_TYPE_DIRECTED) { SetupDeviceForUnicast(adapter); pf_ctrl.bits.filter_uni_en = 1; pf_ctrl |= 4; ctrl.bits.pkt_filter_disable = 0; } /* Set us up with Broadcast packet filtering */ if (filter & ET131X_PACKET_TYPE_BROADCAST) { pf_ctrl.bits.filter_broad_en = 1; pf_ctrl |= 1; /* Broadcast filter bit */ ctrl.bits.pkt_filter_disable = 0; } else { pf_ctrl.bits.filter_broad_en = 0; } } else pf_ctrl &= ~1; /* Setup the receive mac configuration registers - Packet * Filter control + the enable / disable for packet filter * in the control reg. */ writel(pf_ctrl.value, &adapter->regs->rxmac.pf_ctrl.value); writel(pf_ctrl, &adapter->regs->rxmac.pf_ctrl); writel(ctrl.value, &adapter->regs->rxmac.ctrl.value); } return status; Loading