Commit b0641cb8 authored by Jani Nikula's avatar Jani Nikula
Browse files

drm/i915/psr: remove unused lines_to_wait vbt info 



The lines_to_wait info from VBT is never used. Remove.

Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Jouni Högander <jouni.hogander@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarJani Nikula <jani.nikula@intel.com>
Reviewed-by: default avatarJosé Roberto de Souza <jose.souza@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20220112112715.1234366-1-jani.nikula@intel.com
parent a8cf6073

drivers/gpu/drm/i915/display/intel_bios.c

+0 −20
Original line number Diff line number Diff line
@@ -905,26 +905,6 @@ parse_psr(struct drm_i915_private *i915, const struct bdb_header *bdb) 
	i915->vbt.psr.idle_frames = psr_table->idle_frames < 0 ? 0 :

		psr_table->idle_frames > 15 ? 15 : psr_table->idle_frames;



	switch (psr_table->lines_to_wait) {

	case 0:

		i915->vbt.psr.lines_to_wait = PSR_0_LINES_TO_WAIT;

		break;

	case 1:

		i915->vbt.psr.lines_to_wait = PSR_1_LINE_TO_WAIT;

		break;

	case 2:

		i915->vbt.psr.lines_to_wait = PSR_4_LINES_TO_WAIT;

		break;

	case 3:

		i915->vbt.psr.lines_to_wait = PSR_8_LINES_TO_WAIT;

		break;

	default:

		drm_dbg_kms(&i915->drm,

			    "VBT has unknown PSR lines to wait %u\n",

			    psr_table->lines_to_wait);

		break;

	}



	/*

	 * New psr options 0=500us, 1=100us, 2=2500us, 3=0us

	 * Old decimal value is wake up time in multiples of 100 us.

drivers/gpu/drm/i915/i915_drv.h

+0 −8
Original line number Diff line number Diff line
@@ -516,13 +516,6 @@ i915_fence_timeout(const struct drm_i915_private *i915) 
/* Amount of PSF GV points, BSpec precisely defines this */

#define I915_NUM_PSF_GV_POINTS 3



enum psr_lines_to_wait {

	PSR_0_LINES_TO_WAIT = 0,

	PSR_1_LINE_TO_WAIT,

	PSR_4_LINES_TO_WAIT,

	PSR_8_LINES_TO_WAIT

};



struct intel_vbt_data {

	/* bdb version */

	u16 version;
@@ -562,7 +555,6 @@ struct intel_vbt_data { 
		bool full_link;

		bool require_aux_wakeup;

		int idle_frames;

		enum psr_lines_to_wait lines_to_wait;

		int tp1_wakeup_time_us;

		int tp2_tp3_wakeup_time_us;

		int psr2_tp2_tp3_wakeup_time_us;