Loading Documentation/virt/kvm/api.rst +12 −0 Original line number Diff line number Diff line Loading @@ -3115,6 +3115,18 @@ optional features it should have. This will cause a reset of the cpu registers to their initial values. If this is not called, KVM_RUN will return ENOEXEC for that vcpu. The initial values are defined as: - Processor state: * AArch64: EL1h, D, A, I and F bits set. All other bits are cleared. * AArch32: SVC, A, I and F bits set. All other bits are cleared. - General Purpose registers, including PC and SP: set to 0 - FPSIMD/NEON registers: set to 0 - SVE registers: set to 0 - System registers: Reset to their architecturally defined values as for a warm reset to EL1 (resp. SVC) Note that because some registers reflect machine topology, all vcpus should be created before this ioctl is invoked. Loading MAINTAINERS +2 −2 Original line number Diff line number Diff line Loading @@ -9767,10 +9767,10 @@ F: virt/kvm/* KERNEL VIRTUAL MACHINE FOR ARM64 (KVM/arm64) M: Marc Zyngier <maz@kernel.org> R: James Morse <james.morse@arm.com> R: Julien Thierry <julien.thierry.kdev@gmail.com> R: Alexandru Elisei <alexandru.elisei@arm.com> R: Suzuki K Poulose <suzuki.poulose@arm.com> L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: kvmarm@lists.cs.columbia.edu L: kvmarm@lists.cs.columbia.edu (moderated for non-subscribers) S: Maintained T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm.git F: arch/arm64/include/asm/kvm* Loading arch/arm64/kvm/arm.c +3 −1 Original line number Diff line number Diff line Loading @@ -1881,9 +1881,11 @@ static int init_hyp_mode(void) if (is_protected_kvm_enabled()) { init_cpu_logical_map(); if (!init_psci_relay()) if (!init_psci_relay()) { err = -ENODEV; goto out_err; } } if (is_protected_kvm_enabled()) { err = kvm_hyp_init_protection(hyp_va_bits); Loading arch/arm64/kvm/hyp/nvhe/gen-hyprel.c +18 −0 Original line number Diff line number Diff line Loading @@ -50,6 +50,18 @@ #ifndef R_AARCH64_ABS64 #define R_AARCH64_ABS64 257 #endif #ifndef R_AARCH64_PREL64 #define R_AARCH64_PREL64 260 #endif #ifndef R_AARCH64_PREL32 #define R_AARCH64_PREL32 261 #endif #ifndef R_AARCH64_PREL16 #define R_AARCH64_PREL16 262 #endif #ifndef R_AARCH64_PLT32 #define R_AARCH64_PLT32 314 #endif #ifndef R_AARCH64_LD_PREL_LO19 #define R_AARCH64_LD_PREL_LO19 273 #endif Loading Loading @@ -371,6 +383,12 @@ static void emit_rela_section(Elf64_Shdr *sh_rela) case R_AARCH64_ABS64: emit_rela_abs64(rela, sh_orig_name); break; /* Allow position-relative data relocations. */ case R_AARCH64_PREL64: case R_AARCH64_PREL32: case R_AARCH64_PREL16: case R_AARCH64_PLT32: break; /* Allow relocations to generate PC-relative addressing. */ case R_AARCH64_LD_PREL_LO19: case R_AARCH64_ADR_PREL_LO21: Loading arch/arm64/kvm/reset.c +5 −0 Original line number Diff line number Diff line Loading @@ -238,6 +238,11 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) /* Reset core registers */ memset(vcpu_gp_regs(vcpu), 0, sizeof(*vcpu_gp_regs(vcpu))); memset(&vcpu->arch.ctxt.fp_regs, 0, sizeof(vcpu->arch.ctxt.fp_regs)); vcpu->arch.ctxt.spsr_abt = 0; vcpu->arch.ctxt.spsr_und = 0; vcpu->arch.ctxt.spsr_irq = 0; vcpu->arch.ctxt.spsr_fiq = 0; vcpu_gp_regs(vcpu)->pstate = pstate; /* Reset system registers */ Loading Loading
Documentation/virt/kvm/api.rst +12 −0 Original line number Diff line number Diff line Loading @@ -3115,6 +3115,18 @@ optional features it should have. This will cause a reset of the cpu registers to their initial values. If this is not called, KVM_RUN will return ENOEXEC for that vcpu. The initial values are defined as: - Processor state: * AArch64: EL1h, D, A, I and F bits set. All other bits are cleared. * AArch32: SVC, A, I and F bits set. All other bits are cleared. - General Purpose registers, including PC and SP: set to 0 - FPSIMD/NEON registers: set to 0 - SVE registers: set to 0 - System registers: Reset to their architecturally defined values as for a warm reset to EL1 (resp. SVC) Note that because some registers reflect machine topology, all vcpus should be created before this ioctl is invoked. Loading
MAINTAINERS +2 −2 Original line number Diff line number Diff line Loading @@ -9767,10 +9767,10 @@ F: virt/kvm/* KERNEL VIRTUAL MACHINE FOR ARM64 (KVM/arm64) M: Marc Zyngier <maz@kernel.org> R: James Morse <james.morse@arm.com> R: Julien Thierry <julien.thierry.kdev@gmail.com> R: Alexandru Elisei <alexandru.elisei@arm.com> R: Suzuki K Poulose <suzuki.poulose@arm.com> L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) L: kvmarm@lists.cs.columbia.edu L: kvmarm@lists.cs.columbia.edu (moderated for non-subscribers) S: Maintained T: git git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm.git F: arch/arm64/include/asm/kvm* Loading
arch/arm64/kvm/arm.c +3 −1 Original line number Diff line number Diff line Loading @@ -1881,9 +1881,11 @@ static int init_hyp_mode(void) if (is_protected_kvm_enabled()) { init_cpu_logical_map(); if (!init_psci_relay()) if (!init_psci_relay()) { err = -ENODEV; goto out_err; } } if (is_protected_kvm_enabled()) { err = kvm_hyp_init_protection(hyp_va_bits); Loading
arch/arm64/kvm/hyp/nvhe/gen-hyprel.c +18 −0 Original line number Diff line number Diff line Loading @@ -50,6 +50,18 @@ #ifndef R_AARCH64_ABS64 #define R_AARCH64_ABS64 257 #endif #ifndef R_AARCH64_PREL64 #define R_AARCH64_PREL64 260 #endif #ifndef R_AARCH64_PREL32 #define R_AARCH64_PREL32 261 #endif #ifndef R_AARCH64_PREL16 #define R_AARCH64_PREL16 262 #endif #ifndef R_AARCH64_PLT32 #define R_AARCH64_PLT32 314 #endif #ifndef R_AARCH64_LD_PREL_LO19 #define R_AARCH64_LD_PREL_LO19 273 #endif Loading Loading @@ -371,6 +383,12 @@ static void emit_rela_section(Elf64_Shdr *sh_rela) case R_AARCH64_ABS64: emit_rela_abs64(rela, sh_orig_name); break; /* Allow position-relative data relocations. */ case R_AARCH64_PREL64: case R_AARCH64_PREL32: case R_AARCH64_PREL16: case R_AARCH64_PLT32: break; /* Allow relocations to generate PC-relative addressing. */ case R_AARCH64_LD_PREL_LO19: case R_AARCH64_ADR_PREL_LO21: Loading
arch/arm64/kvm/reset.c +5 −0 Original line number Diff line number Diff line Loading @@ -238,6 +238,11 @@ int kvm_reset_vcpu(struct kvm_vcpu *vcpu) /* Reset core registers */ memset(vcpu_gp_regs(vcpu), 0, sizeof(*vcpu_gp_regs(vcpu))); memset(&vcpu->arch.ctxt.fp_regs, 0, sizeof(vcpu->arch.ctxt.fp_regs)); vcpu->arch.ctxt.spsr_abt = 0; vcpu->arch.ctxt.spsr_und = 0; vcpu->arch.ctxt.spsr_irq = 0; vcpu->arch.ctxt.spsr_fiq = 0; vcpu_gp_regs(vcpu)->pstate = pstate; /* Reset system registers */ Loading