Commit ab9c2a75 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'qcom-dts-for-5.14' of...

Merge tag 'qcom-dts-for-5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt

Qualcomm DTS updates for v5.14

This adds DMA, NAND controllers, USB controller and PHY, RPM, L2CC,
thermal sensors and defines thermal zones. It them enables these for the
RB3011.

* tag 'qcom-dts-for-5.14' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  ARM: dts: qcom: Enable NAND + USB for RB3011
  ARM: dts: qcom: add L2CC and RPM for IPQ8064
  ARM: dts: qcom: Add USB port definitions to ipq806x
  ARM: dts: qcom: Add tsens details to ipq806x
  ARM: dts: qcom: Add ADM DMA + NAND definitions to ipq806x

Link: https://lore.kernel.org/r/20210614223840.393224-1-bjorn.andersson@linaro.org


Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 2e2ec371 2011fc7a
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+58 −0
Original line number Diff line number Diff line
@@ -216,6 +216,10 @@ led@7 {
	};
};

&adm_dma {
	status = "okay";
};

&gmac0 {
	status = "okay";

@@ -251,6 +255,39 @@ &gsbi7_serial {
	status = "okay";
};

&hs_phy_1 {
	status = "okay";
};

&nand {
	status = "okay";

	nandcs@0 {
		compatible = "qcom,nandcs";
		reg = <0>;

		nand-ecc-strength = <4>;
		nand-bus-width = <8>;
		nand-ecc-step-size = <512>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			boot@0 {
				label = "RouterBoard NAND 1 Boot";
				reg = <0x0000000 0x0800000>;
			};

			main@800000 {
				label = "RouterBoard NAND 1 Main";
				reg = <0x0800000 0x7800000>;
			};
		};
	};
};

&qcom_pinmux {
	buttons_pins: buttons_pins {
		mux {
@@ -305,4 +342,25 @@ mux {
			input-disable;
		};
	};

	usb1_pwr_en_pins: usb1_pwr_en_pins {
		mux {
			pins = "gpio4";
			function = "gpio";
			drive-strength = <16>;
			bias-disable;
			output-high;
		};
	};
};

&ss_phy_1 {
	status = "okay";
};

&usb3_1 {
	pinctrl-0 = <&usb1_pwr_en_pins>;
	pinctrl-names = "default";

	status = "okay";
};
+425 −0
Original line number Diff line number Diff line
@@ -2,6 +2,8 @@
/dts-v1/;

#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/mfd/qcom-rpm.h>
#include <dt-bindings/clock/qcom,rpmcc.h>
#include <dt-bindings/clock/qcom,gcc-ipq806x.h>
#include <dt-bindings/clock/qcom,lcc-ipq806x.h>
#include <dt-bindings/gpio/gpio.h>
@@ -46,6 +48,228 @@ L2: l2-cache {
		};
	};

	thermal-zones {
		tsens_tz_sensor0 {
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&tsens 0>;

			trips {
				cpu-critical {
					temperature = <105000>;
					hysteresis = <2000>;
					type = "critical";
				};

				cpu-hot {
					temperature = <95000>;
					hysteresis = <2000>;
					type = "hot";
				};
			};
		};

		tsens_tz_sensor1 {
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&tsens 1>;

			trips {
				cpu-critical {
					temperature = <105000>;
					hysteresis = <2000>;
					type = "critical";
				};

				cpu-hot {
					temperature = <95000>;
					hysteresis = <2000>;
					type = "hot";
				};
			};
		};

		tsens_tz_sensor2 {
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&tsens 2>;

			trips {
				cpu-critical {
					temperature = <105000>;
					hysteresis = <2000>;
					type = "critical";
				};

				cpu-hot {
					temperature = <95000>;
					hysteresis = <2000>;
					type = "hot";
				};
			};
		};

		tsens_tz_sensor3 {
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&tsens 3>;

			trips {
				cpu-critical {
					temperature = <105000>;
					hysteresis = <2000>;
					type = "critical";
				};

				cpu-hot {
					temperature = <95000>;
					hysteresis = <2000>;
					type = "hot";
				};
			};
		};

		tsens_tz_sensor4 {
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&tsens 4>;

			trips {
				cpu-critical {
					temperature = <105000>;
					hysteresis = <2000>;
					type = "critical";
				};

				cpu-hot {
					temperature = <95000>;
					hysteresis = <2000>;
					type = "hot";
				};
			};
		};

		tsens_tz_sensor5 {
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&tsens 5>;

			trips {
				cpu-critical {
					temperature = <105000>;
					hysteresis = <2000>;
					type = "critical";
				};

				cpu-hot {
					temperature = <95000>;
					hysteresis = <2000>;
					type = "hot";
				};
			};
		};

		tsens_tz_sensor6 {
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&tsens 6>;

			trips {
				cpu-critical {
					temperature = <105000>;
					hysteresis = <2000>;
					type = "critical";
				};

				cpu-hot {
					temperature = <95000>;
					hysteresis = <2000>;
					type = "hot";
				};
			};
		};

		tsens_tz_sensor7 {
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&tsens 7>;

			trips {
				cpu-critical {
					temperature = <105000>;
					hysteresis = <2000>;
					type = "critical";
				};

				cpu-hot {
					temperature = <95000>;
					hysteresis = <2000>;
					type = "hot";
				};
			};
		};

		tsens_tz_sensor8 {
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&tsens 8>;

			trips {
				cpu-critical {
					temperature = <105000>;
					hysteresis = <2000>;
					type = "critical";
				};

				cpu-hot {
					temperature = <95000>;
					hysteresis = <2000>;
					type = "hot";
				};
			};
		};

		tsens_tz_sensor9 {
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&tsens 9>;

			trips {
				cpu-critical {
					temperature = <105000>;
					hysteresis = <2000>;
					type = "critical";
				};

				cpu-hot {
					temperature = <95000>;
					hysteresis = <2000>;
					type = "hot";
				};
			};
		};

		tsens_tz_sensor10 {
			polling-delay-passive = <0>;
			polling-delay = <0>;
			thermal-sensors = <&tsens 10>;

			trips {
				cpu-critical {
					temperature = <105000>;
					hysteresis = <2000>;
					type = "critical";
				};

				cpu-hot {
					temperature = <95000>;
					hysteresis = <2000>;
					type = "hot";
				};
			};
		};
	};

	memory {
		device_type = "memory";
		reg = <0x0 0x0>;
@@ -185,6 +409,31 @@ mux {
					bias-pull-up;
				};
			};

			nand_pins: nand_pins {
				mux {
					pins = "gpio34", "gpio35", "gpio36",
					       "gpio37", "gpio38", "gpio39",
					       "gpio40", "gpio41", "gpio42",
					       "gpio43", "gpio44", "gpio45",
					       "gpio46", "gpio47";
					function = "nand";
					drive-strength = <10>;
					bias-disable;
				};

				pullups {
					pins = "gpio39";
					bias-pull-up;
				};

				hold {
					pins = "gpio40", "gpio41", "gpio42",
					       "gpio43", "gpio44", "gpio45",
					       "gpio46", "gpio47";
					bias-bus-hold;
				};
			};
		};

		intc: interrupt-controller@2000000 {
@@ -226,6 +475,26 @@ acc1: clock-controller@2098000 {
			reg = <0x02098000 0x1000>, <0x02008000 0x1000>;
		};

		adm_dma: dma-controller@18300000 {
			compatible = "qcom,adm";
			reg = <0x18300000 0x100000>;
			interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>;
			#dma-cells = <1>;

			clocks = <&gcc ADM0_CLK>, <&gcc ADM0_PBUS_CLK>;
			clock-names = "core", "iface";

			resets = <&gcc ADM0_RESET>,
				 <&gcc ADM0_PBUS_RESET>,
				 <&gcc ADM0_C0_RESET>,
				 <&gcc ADM0_C1_RESET>,
				 <&gcc ADM0_C2_RESET>;
			reset-names = "clk", "pbus", "c0", "c1", "c2";
			qcom,ee = <0>;

			status = "disabled";
		};

		saw0: regulator@2089000 {
			compatible = "qcom,saw2";
			reg = <0x02089000 0x1000>, <0x02009000 0x1000>;
@@ -403,6 +672,28 @@ sata_phy: sata-phy@1b400000 {
			status = "disabled";
		};

		nand: nand-controller@1ac00000 {
			compatible = "qcom,ipq806x-nand";
			reg = <0x1ac00000 0x800>;

			pinctrl-0 = <&nand_pins>;
			pinctrl-names = "default";

			clocks = <&gcc EBI2_CLK>,
				 <&gcc EBI2_AON_CLK>;
			clock-names = "core", "aon";

			dmas = <&adm_dma 3>;
			dma-names = "rxtx";
			qcom,cmd-crci = <15>;
			qcom,data-crci = <3>;

			#address-cells = <1>;
			#size-cells = <0>;

			status = "disabled";
		};

		sata: sata@29000000 {
			compatible = "qcom,ipq806x-ahci", "generic-ahci";
			reg = <0x29000000 0x180>;
@@ -436,6 +727,12 @@ qfprom: qfprom@700000 {
			reg = <0x00700000 0x1000>;
			#address-cells = <1>;
			#size-cells = <1>;
			tsens_calib: calib@400 {
				reg = <0x400 0xb>;
			};
			tsens_calib_backup: calib_backup@410 {
				reg = <0x410 0xb>;
			};
		};

		gcc: clock-controller@900000 {
@@ -443,6 +740,38 @@ gcc: clock-controller@900000 {
			reg = <0x00900000 0x4000>;
			#clock-cells = <1>;
			#reset-cells = <1>;
			#power-domain-cells = <1>;

			tsens: thermal-sensor@900000 {
				compatible = "qcom,ipq8064-tsens";

				nvmem-cells = <&tsens_calib>, <&tsens_calib_backup>;
				nvmem-cell-names = "calib", "calib_backup";
				interrupts = <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>;
				interrupt-names = "uplow";

				#qcom,sensors = <11>;
				#thermal-sensor-cells = <1>;
			};
		};

		rpm: rpm@108000 {
			compatible = "qcom,rpm-ipq8064";
			reg = <0x108000 0x1000>;
			qcom,ipc = <&l2cc 0x8 2>;

			interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
					<GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
					<GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "ack", "err", "wakeup";

			clocks = <&gcc RPM_MSG_RAM_H_CLK>;
			clock-names = "ram";

			rpmcc: clock-controller {
				compatible = "qcom,rpmcc-ipq806x", "qcom,rpmcc";
				#clock-cells = <1>;
			};
		};

		tcsr: syscon@1a400000 {
@@ -450,6 +779,14 @@ tcsr: syscon@1a400000 {
			reg = <0x1a400000 0x100>;
		};

		l2cc: clock-controller@2011000 {
			compatible = "qcom,kpss-gcc", "syscon";
			reg = <0x2011000 0x1000>;
			clocks = <&gcc PLL8_VOTE>, <&gcc PXO_SRC>;
			clock-names = "pll8_vote", "pxo";
			clock-output-names = "acpu_l2_aux";
		};

		lcc: clock-controller@28000000 {
			compatible = "qcom,lcc-ipq8064";
			reg = <0x28000000 0x1000>;
@@ -718,6 +1055,94 @@ gmac3: ethernet@37600000 {
			status = "disabled";
		};

		hs_phy_0: phy@100f8800 {
			compatible = "qcom,ipq806x-usb-phy-hs";
			reg = <0x100f8800 0x30>;
			clocks = <&gcc USB30_0_UTMI_CLK>;
			clock-names = "ref";
			#phy-cells = <0>;

			status = "disabled";
		};

		ss_phy_0: phy@100f8830 {
			compatible = "qcom,ipq806x-usb-phy-ss";
			reg = <0x100f8830 0x30>;
			clocks = <&gcc USB30_0_MASTER_CLK>;
			clock-names = "ref";
			#phy-cells = <0>;

			status = "disabled";
		};

		usb3_0: usb3@100f8800 {
			compatible = "qcom,dwc3", "syscon";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x100f8800 0x8000>;
			clocks = <&gcc USB30_0_MASTER_CLK>;
			clock-names = "core";

			ranges;

			resets = <&gcc USB30_0_MASTER_RESET>;
			reset-names = "master";

			status = "disabled";

			dwc3_0: dwc3@10000000 {
				compatible = "snps,dwc3";
				reg = <0x10000000 0xcd00>;
				interrupts = <GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH>;
				phys = <&hs_phy_0>, <&ss_phy_0>;
				phy-names = "usb2-phy", "usb3-phy";
				dr_mode = "host";
				snps,dis_u3_susphy_quirk;
			};
		};

		hs_phy_1: phy@110f8800 {
			compatible = "qcom,ipq806x-usb-phy-hs";
			reg = <0x110f8800 0x30>;
			clocks = <&gcc USB30_1_UTMI_CLK>;
			clock-names = "ref";
			#phy-cells = <0>;
		};

		ss_phy_1: phy@110f8830 {
			compatible = "qcom,ipq806x-usb-phy-ss";
			reg = <0x110f8830 0x30>;
			clocks = <&gcc USB30_1_MASTER_CLK>;
			clock-names = "ref";
			#phy-cells = <0>;
		};

		usb3_1: usb3@110f8800 {
			compatible = "qcom,dwc3", "syscon";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x110f8800 0x8000>;
			clocks = <&gcc USB30_1_MASTER_CLK>;
			clock-names = "core";

			ranges;

			resets = <&gcc USB30_1_MASTER_RESET>;
			reset-names = "master";

			status = "disabled";

			dwc3_1: dwc3@11000000 {
				compatible = "snps,dwc3";
				reg = <0x11000000 0xcd00>;
				interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
				phys = <&hs_phy_1>, <&ss_phy_1>;
				phy-names = "usb2-phy", "usb3-phy";
				dr_mode = "host";
				snps,dis_u3_susphy_quirk;
			};
		};

		vsdcc_fixed: vsdcc-regulator {
			compatible = "regulator-fixed";
			regulator-name = "SDCC Power";