Loading arch/arm/Kconfig +7 −0 Original line number Diff line number Diff line Loading @@ -861,6 +861,7 @@ config SMP depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP) depends on GENERIC_CLOCKEVENTS select USE_GENERIC_SMP_HELPERS select HAVE_ARM_SCU if ARCH_REALVIEW help This enables support for systems with more than one CPU. If you have a system with only one CPU, like most personal computers, say N. If Loading @@ -878,6 +879,12 @@ config SMP If you don't know what to do here, say N. config HAVE_ARM_SCU bool depends on SMP help This option enables support for the ARM system coherency unit choice prompt "Memory split" default VMSPLIT_3G Loading arch/arm/include/asm/smp_scu.h +2 −8 Original line number Diff line number Diff line #ifndef __ASMARM_ARCH_SCU_H #define __ASMARM_ARCH_SCU_H /* * SCU registers */ #define SCU_CTRL 0x00 #define SCU_CONFIG 0x04 #define SCU_CPU_STATUS 0x08 #define SCU_INVALIDATE 0x0c #define SCU_FPGA_REVISION 0x10 unsigned int scu_get_core_count(void __iomem *); void scu_enable(void __iomem *); #endif arch/arm/kernel/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -22,6 +22,7 @@ obj-$(CONFIG_ARTHUR) += arthur.o obj-$(CONFIG_ISA_DMA) += dma-isa.o obj-$(CONFIG_PCI) += bios32.o isa.o obj-$(CONFIG_SMP) += smp.o obj-$(CONFIG_HAVE_ARM_SCU) += smp_scu.o obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o obj-$(CONFIG_KPROBES) += kprobes.o kprobes-decode.o Loading arch/arm/kernel/smp_scu.c 0 → 100644 +41 −0 Original line number Diff line number Diff line /* * linux/arch/arm/kernel/smp_scu.c * * Copyright (C) 2002 ARM Ltd. * All Rights Reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #include <linux/init.h> #include <linux/io.h> #include <asm/smp_scu.h> #define SCU_CTRL 0x00 #define SCU_CONFIG 0x04 #define SCU_CPU_STATUS 0x08 #define SCU_INVALIDATE 0x0c #define SCU_FPGA_REVISION 0x10 /* * Get the number of CPU cores from the SCU configuration */ unsigned int __init scu_get_core_count(void __iomem *scu_base) { unsigned int ncores = __raw_readl(scu_base + SCU_CONFIG); return (ncores & 0x03) + 1; } /* * Enable the SCU */ void __init scu_enable(void __iomem *scu_base) { u32 scu_ctrl; scu_ctrl = __raw_readl(scu_base + SCU_CTRL); scu_ctrl |= 1; __raw_writel(scu_ctrl, scu_base + SCU_CTRL); } arch/arm/mach-realview/platsmp.c +5 −24 Original line number Diff line number Diff line Loading @@ -45,31 +45,12 @@ static void __iomem *scu_base_addr(void) return (void __iomem *)0; } static unsigned int __init get_core_count(void) static inline unsigned int get_core_count(void) { unsigned int ncores; void __iomem *scu_base = scu_base_addr(); if (scu_base) { ncores = __raw_readl(scu_base + SCU_CONFIG); ncores = (ncores & 0x03) + 1; } else ncores = 1; return ncores; } /* * Setup the SCU */ static void scu_enable(void) { u32 scu_ctrl; void __iomem *scu_base = scu_base_addr(); scu_ctrl = __raw_readl(scu_base + SCU_CTRL); scu_ctrl |= 1; __raw_writel(scu_ctrl, scu_base + SCU_CTRL); if (scu_base) return scu_get_core_count(scu_base); return 1; } static DEFINE_SPINLOCK(boot_lock); Loading Loading @@ -239,7 +220,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus) */ percpu_timer_setup(); scu_enable(); scu_enable(scu_base_addr()); poke_milo(); } } Loading
arch/arm/Kconfig +7 −0 Original line number Diff line number Diff line Loading @@ -861,6 +861,7 @@ config SMP depends on EXPERIMENTAL && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP) depends on GENERIC_CLOCKEVENTS select USE_GENERIC_SMP_HELPERS select HAVE_ARM_SCU if ARCH_REALVIEW help This enables support for systems with more than one CPU. If you have a system with only one CPU, like most personal computers, say N. If Loading @@ -878,6 +879,12 @@ config SMP If you don't know what to do here, say N. config HAVE_ARM_SCU bool depends on SMP help This option enables support for the ARM system coherency unit choice prompt "Memory split" default VMSPLIT_3G Loading
arch/arm/include/asm/smp_scu.h +2 −8 Original line number Diff line number Diff line #ifndef __ASMARM_ARCH_SCU_H #define __ASMARM_ARCH_SCU_H /* * SCU registers */ #define SCU_CTRL 0x00 #define SCU_CONFIG 0x04 #define SCU_CPU_STATUS 0x08 #define SCU_INVALIDATE 0x0c #define SCU_FPGA_REVISION 0x10 unsigned int scu_get_core_count(void __iomem *); void scu_enable(void __iomem *); #endif
arch/arm/kernel/Makefile +1 −0 Original line number Diff line number Diff line Loading @@ -22,6 +22,7 @@ obj-$(CONFIG_ARTHUR) += arthur.o obj-$(CONFIG_ISA_DMA) += dma-isa.o obj-$(CONFIG_PCI) += bios32.o isa.o obj-$(CONFIG_SMP) += smp.o obj-$(CONFIG_HAVE_ARM_SCU) += smp_scu.o obj-$(CONFIG_DYNAMIC_FTRACE) += ftrace.o obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o obj-$(CONFIG_KPROBES) += kprobes.o kprobes-decode.o Loading
arch/arm/kernel/smp_scu.c 0 → 100644 +41 −0 Original line number Diff line number Diff line /* * linux/arch/arm/kernel/smp_scu.c * * Copyright (C) 2002 ARM Ltd. * All Rights Reserved * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as * published by the Free Software Foundation. */ #include <linux/init.h> #include <linux/io.h> #include <asm/smp_scu.h> #define SCU_CTRL 0x00 #define SCU_CONFIG 0x04 #define SCU_CPU_STATUS 0x08 #define SCU_INVALIDATE 0x0c #define SCU_FPGA_REVISION 0x10 /* * Get the number of CPU cores from the SCU configuration */ unsigned int __init scu_get_core_count(void __iomem *scu_base) { unsigned int ncores = __raw_readl(scu_base + SCU_CONFIG); return (ncores & 0x03) + 1; } /* * Enable the SCU */ void __init scu_enable(void __iomem *scu_base) { u32 scu_ctrl; scu_ctrl = __raw_readl(scu_base + SCU_CTRL); scu_ctrl |= 1; __raw_writel(scu_ctrl, scu_base + SCU_CTRL); }
arch/arm/mach-realview/platsmp.c +5 −24 Original line number Diff line number Diff line Loading @@ -45,31 +45,12 @@ static void __iomem *scu_base_addr(void) return (void __iomem *)0; } static unsigned int __init get_core_count(void) static inline unsigned int get_core_count(void) { unsigned int ncores; void __iomem *scu_base = scu_base_addr(); if (scu_base) { ncores = __raw_readl(scu_base + SCU_CONFIG); ncores = (ncores & 0x03) + 1; } else ncores = 1; return ncores; } /* * Setup the SCU */ static void scu_enable(void) { u32 scu_ctrl; void __iomem *scu_base = scu_base_addr(); scu_ctrl = __raw_readl(scu_base + SCU_CTRL); scu_ctrl |= 1; __raw_writel(scu_ctrl, scu_base + SCU_CTRL); if (scu_base) return scu_get_core_count(scu_base); return 1; } static DEFINE_SPINLOCK(boot_lock); Loading Loading @@ -239,7 +220,7 @@ void __init smp_prepare_cpus(unsigned int max_cpus) */ percpu_timer_setup(); scu_enable(); scu_enable(scu_base_addr()); poke_milo(); } }