Unverified Commit a5a44f4d authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'imx-dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt

i.MX arm device tree change for 5.17:

- New board support: TQ-Systems MBa6x, Y Soft IOTA Crux/Crux+ board,
  JOZ Access Point, Phytec PEB-WLBT-05 support, BSH SMM-M2 IMX6ULZ
  SystemMaster.
- Update SPBA bus node name to match binding schema.
- A series from Christoph Niedermaier to update imx6qdl-dhcom board
  around Ethernet and USB support.
- A series from Giulio Benetti to clean up undocumented/unused fixed
  clock compatibles.
- A series from Laurent Pinchart to update i.MX7 MIPI_CSI support.
- A couple of changes from Russell to update phy-mode for
  vf610-zii-dev-rev-b board.
- Add Wacom digitizer support for imx7d-remarkable2 device.

* tag 'imx-dt-5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (36 commits)
  ARM: dts: imx6: phytec: Add PEB-WLBT-05 support
  ARM: dts: imx6qdl: phytec: Add support for optional PEB-AV-02 LCD adapter
  ARM: dts: imx6qdl: phytec: Add support for optional PEB-EVAL-01 board
  ARM: dts: imx6qdl-dhcom: Add USB overcurrent pin on SoM layer
  ARM: dts: imx7d-remarkable2: add wacom digitizer device
  ARM: dts: imx6ulz-bsh-smm-m2: Add BSH SMM-M2 IMX6ULZ SystemMaster
  ARM: dts: imx6qdl-dhcom: Identify the PHY by ethernet-phy-id0007.c0f0
  ARM: dts: imx6qdl-dhcom: Align PHY reset timing with other DHCOM SoMs
  ARM: dts: imx6qdl: drop "fsl,imx-ckih1"
  ARM: dts: imx6qdl: drop "fsl,imx-ckil"
  ARM: dts: imx6qdl: drop "fsl,imx-osc"
  ARM: dts: imx53: drop "fsl,imx-ckih2"
  ARM: dts: imx53: drop "fsl,imx-ckih1"
  ARM: dts: imx53: drop "fsl,imx-ckil"
  ARM: dts: imx53: drop "fsl,imx-osc"
  ARM: dts: imx51: drop "fsl,imx-ckih2"
  ARM: dts: imx51: drop "fsl,imx-ckih1"
  ARM: dts: imx51: drop "fsl,imx-ckil"
  ARM: dts: imx51: drop "fsl,imx-osc"
  ARM: dts: imx50: drop "fsl,imx-ckih2"
  ...

Link: https://lore.kernel.org/r/20211218071427.26745-4-shawnguo@kernel.org


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents 9018001e 3951cc6b
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+10 −1
Original line number Diff line number Diff line
@@ -486,6 +486,8 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
	imx6dl-icore-rqs.dtb \
	imx6dl-lanmcu.dtb \
	imx6dl-mamoj.dtb \
	imx6dl-mba6a.dtb \
	imx6dl-mba6b.dtb \
	imx6dl-nit6xlite.dtb \
	imx6dl-nitrogen6x.dtb \
	imx6dl-phytec-mira-rdk-nand.dtb \
@@ -587,6 +589,8 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
	imx6q-kp-tpc.dtb \
	imx6q-logicpd.dtb \
	imx6q-marsboard.dtb \
	imx6q-mba6a.dtb \
	imx6q-mba6b.dtb \
	imx6q-mccmon6.dtb \
	imx6q-nitrogen6x.dtb \
	imx6q-nitrogen6_max.dtb \
@@ -631,7 +635,9 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
	imx6q-wandboard.dtb \
	imx6q-wandboard-revb1.dtb \
	imx6q-wandboard-revd1.dtb \
	imx6q-yapp4-crux.dtb \
	imx6q-zii-rdu2.dtb \
	imx6qp-mba6b.dtb \
	imx6qp-nitrogen6_max.dtb \
	imx6qp-nitrogen6_som2.dtb \
	imx6qp-phytec-mira-rdk-nand.dtb \
@@ -644,6 +650,7 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
	imx6qp-tx6qp-8137-mb7.dtb \
	imx6qp-vicutp.dtb \
	imx6qp-wandboard-revd1.dtb \
	imx6qp-yapp4-crux-plus.dtb \
	imx6qp-zii-rdu2.dtb \
	imx6s-dhcom-drc02.dtb
dtb-$(CONFIG_SOC_IMX6SL) += \
@@ -691,12 +698,14 @@ dtb-$(CONFIG_SOC_IMX6UL) += \
	imx6ull-colibri-emmc-eval-v3.dtb \
	imx6ull-colibri-eval-v3.dtb \
	imx6ull-colibri-wifi-eval-v3.dtb \
	imx6ull-jozacp.dtb \
	imx6ull-myir-mys-6ulx-eval.dtb \
	imx6ull-opos6uldev.dtb \
	imx6ull-phytec-segin-ff-rdk-nand.dtb \
	imx6ull-phytec-segin-ff-rdk-emmc.dtb \
	imx6ull-phytec-segin-lc-rdk-nand.dtb \
	imx6ulz-14x14-evk.dtb
	imx6ulz-14x14-evk.dtb \
	imx6ulz-bsh-smm-m2.dtb
dtb-$(CONFIG_SOC_IMX7D) += \
	imx7d-cl-som-imx7.dtb \
	imx7d-colibri-aster.dtb \
+3 −3
Original line number Diff line number Diff line
@@ -26,9 +26,9 @@
 *                2 - 0
 *                3 - 1
 *
 * 'pin' is an integer between 0 and 0xbf. i.MX1 has 4 ports with 32 configurable
 * configurable pins each. 'pin' is PORT * 32 + PORT_PIN, PORT_PIN is the pin
 * number on the specific port (between 0 and 31).
 * 'pin' is an integer between 0 and 0xbf. i.MX1 has 4 ports with 32
 * configurable pins each. 'pin' is PORT * 32 + PORT_PIN, PORT_PIN is
 * the pin number on the specific port (between 0 and 31).
 */

#define MX1_PAD_A24__A24			0x00 0x004
+1 −1
Original line number Diff line number Diff line
@@ -55,7 +55,7 @@ cpu@0 {

	clocks {
		clk32 {
			compatible = "fsl,imx-clk32", "fixed-clock";
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <32000>;
		};
+2 −2
Original line number Diff line number Diff line
@@ -62,7 +62,7 @@ asic: asic-interrupt-controller@68000000 {

	clocks {
		osc {
			compatible = "fsl,imx-osc", "fixed-clock";
			compatible = "fixed-clock";
			#clock-cells = <0>;
			clock-frequency = <24000000>;
		};
@@ -200,7 +200,7 @@ audmux: audmux@43fb0000 {
			};
		};

		spba@50000000 {
		spba-bus@50000000 {
			compatible = "fsl,spba-bus", "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
+3 −3
Original line number Diff line number Diff line
@@ -26,9 +26,9 @@
 *                2 - 0
 *                3 - 1
 *
 * 'pin' is an integer between 0 and 0xbf. imx27 has 6 ports with 32 configurable
 * configurable pins each. 'pin' is PORT * 32 + PORT_PIN, PORT_PIN is the pin
 * number on the specific port (between 0 and 31).
 * 'pin' is an integer between 0 and 0xbf. imx27 has 6 ports with 32
 * configurable pins each. 'pin' is PORT * 32 + PORT_PIN, PORT_PIN is
 * the pin number on the specific port (between 0 and 31).
 */

#define MX27_PAD_USBH2_CLK__USBH2_CLK                      0x00 0x000
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