Commit a0136c28 authored by Thomas Bogendoerfer's avatar Thomas Bogendoerfer
Browse files

MIPS: sibyte: Remove Sibyte CARMEL and CRHINE board support 



Looks like these boards were nether in active use, so let's remove them.

Signed-off-by: default avatarThomas Bogendoerfer <tsbogend@alpha.franken.de>
parent b984d7b5

arch/mips/Kconfig

+0 −18
Original line number Diff line number Diff line
@@ -794,24 +794,6 @@ config SGI_IP32 
	help

	  If you want this kernel to run on SGI O2 workstation, say Y here.



config SIBYTE_CRHINE

	bool "Sibyte BCM91120C-CRhine"

	select BOOT_ELF32

	select SIBYTE_BCM1120

	select SWAP_IO_SPACE

	select SYS_HAS_CPU_SB1

	select SYS_SUPPORTS_BIG_ENDIAN

	select SYS_SUPPORTS_LITTLE_ENDIAN



config SIBYTE_CARMEL

	bool "Sibyte BCM91120x-Carmel"

	select BOOT_ELF32

	select SIBYTE_BCM1120

	select SWAP_IO_SPACE

	select SYS_HAS_CPU_SB1

	select SYS_SUPPORTS_BIG_ENDIAN

	select SYS_SUPPORTS_LITTLE_ENDIAN



config SIBYTE_CRHONE

	bool "Sibyte BCM91125C-CRhone"

	select BOOT_ELF32

arch/mips/include/asm/sibyte/board.h

+1 −5
Original line number Diff line number Diff line
@@ -7,7 +7,7 @@ 
#define _SIBYTE_BOARD_H



#if defined(CONFIG_SIBYTE_SWARM) || defined(CONFIG_SIBYTE_CRHONE) || \

    defined(CONFIG_SIBYTE_CRHINE) || defined(CONFIG_SIBYTE_LITTLESUR)

    defined(CONFIG_SIBYTE_LITTLESUR)

#include <asm/sibyte/swarm.h>

#endif
@@ -15,10 +15,6 @@ 
#include <asm/sibyte/sentosa.h>

#endif



#ifdef CONFIG_SIBYTE_CARMEL

#include <asm/sibyte/carmel.h>

#endif



#ifdef CONFIG_SIBYTE_BIGSUR

#include <asm/sibyte/bigsur.h>

#endif

arch/mips/include/asm/sibyte/carmel.h

deleted100644 → 0
+0 −45
Original line number Diff line number Diff line 
/* SPDX-License-Identifier: GPL-2.0-or-later */

/*

 * Copyright (C) 2002 Broadcom Corporation

 */

#ifndef __ASM_SIBYTE_CARMEL_H

#define __ASM_SIBYTE_CARMEL_H



#include <asm/sibyte/sb1250.h>

#include <asm/sibyte/sb1250_int.h>



#define SIBYTE_BOARD_NAME "Carmel"



#define GPIO_PHY_INTERRUPT	2

#define GPIO_NONMASKABLE_INT	3

#define GPIO_CF_INSERTED	6

#define GPIO_MONTEREY_RESET	7

#define GPIO_QUADUART_INT	8

#define GPIO_CF_INT		9

#define GPIO_FPGA_CCLK		10

#define GPIO_FPGA_DOUT		11

#define GPIO_FPGA_DIN		12

#define GPIO_FPGA_PGM		13

#define GPIO_FPGA_DONE		14

#define GPIO_FPGA_INIT		15



#define LEDS_CS			2

#define LEDS_PHYS		0x100C0000

#define MLEDS_CS		3

#define MLEDS_PHYS		0x100A0000

#define UART_CS			4

#define UART_PHYS		0x100D0000

#define ARAVALI_CS		5

#define ARAVALI_PHYS		0x11000000

#define IDE_CS			6

#define IDE_PHYS		0x100B0000

#define ARAVALI2_CS		7

#define ARAVALI2_PHYS		0x100E0000



#if defined(CONFIG_SIBYTE_CARMEL)

#define K_GPIO_GB_IDE	9

#define K_INT_GB_IDE	(K_INT_GPIO_0 + K_GPIO_GB_IDE)

#endif





#endif /* __ASM_SIBYTE_CARMEL_H */

arch/mips/include/asm/sibyte/swarm.h

+0 −5
Original line number Diff line number Diff line
@@ -24,11 +24,6 @@ 
#define SIBYTE_HAVE_PCMCIA 0

#define SIBYTE_HAVE_IDE	   0

#endif

#ifdef CONFIG_SIBYTE_CRHINE

#define SIBYTE_BOARD_NAME "BCM91120C (CRhine)"

#define SIBYTE_HAVE_PCMCIA 0

#define SIBYTE_HAVE_IDE	   0

#endif



/* Generic bus chip selects */

#define LEDS_CS		3

arch/mips/sibyte/Kconfig

+0 −9
Original line number Diff line number Diff line
@@ -10,15 +10,6 @@ config SIBYTE_SB1250 
	select SIBYTE_SB1xxx_SOC

	select SYS_SUPPORTS_SMP



config SIBYTE_BCM1120

	bool

	select CEVT_SB1250

	select CSRC_SB1250

	select IRQ_MIPS_CPU

	select SIBYTE_BCM112X

	select SIBYTE_HAS_ZBUS_PROFILING

	select SIBYTE_SB1xxx_SOC



config SIBYTE_BCM1125

	bool

	select CEVT_SB1250