Commit 9b047458 authored by Aaro Koskinen's avatar Aaro Koskinen Committed by Greg Kroah-Hartman
Browse files

staging: xgifb: eliminate pVBInfo->ECLKData



Access XGI340_ECLKData directly and make it const.

Signed-off-by: default avatarAaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 7e29d632
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+1 −0
Original line number Diff line number Diff line
@@ -262,5 +262,6 @@
extern const struct XGI_ExtStruct XGI330_EModeIDTable[];
extern const struct XGI_Ext2Struct XGI330_RefIndex[];
extern const struct XGI_CRT1TableStruct XGI_CRT1Table[];
extern const struct XGI_ECLKDataStruct XGI340_ECLKData[];

#endif
+7 −7
Original line number Diff line number Diff line
@@ -124,13 +124,13 @@ static void XGINew_SetMemoryClock(struct xgi_hw_device_info *HwDeviceExtension,

	xgifb_reg_set(pVBInfo->P3c4,
		      0x2E,
		      pVBInfo->ECLKData[pVBInfo->ram_type].SR2E);
		      XGI340_ECLKData[pVBInfo->ram_type].SR2E);
	xgifb_reg_set(pVBInfo->P3c4,
		      0x2F,
		      pVBInfo->ECLKData[pVBInfo->ram_type].SR2F);
		      XGI340_ECLKData[pVBInfo->ram_type].SR2F);
	xgifb_reg_set(pVBInfo->P3c4,
		      0x30,
		      pVBInfo->ECLKData[pVBInfo->ram_type].SR30);
		      XGI340_ECLKData[pVBInfo->ram_type].SR30);

	/* When XG42 ECLK = MCLK = 207MHz, Set SR32 D[1:0] = 10b */
	/* Modify SR32 value, when MCLK=207MHZ, ELCK=250MHz,
@@ -138,10 +138,10 @@ static void XGINew_SetMemoryClock(struct xgi_hw_device_info *HwDeviceExtension,
	if (HwDeviceExtension->jChipType == XG42) {
		if ((pVBInfo->MCLKData[pVBInfo->ram_type].SR28 == 0x1C) &&
		    (pVBInfo->MCLKData[pVBInfo->ram_type].SR29 == 0x01) &&
		    (((pVBInfo->ECLKData[pVBInfo->ram_type].SR2E == 0x1C) &&
		      (pVBInfo->ECLKData[pVBInfo->ram_type].SR2F == 0x01)) ||
		     ((pVBInfo->ECLKData[pVBInfo->ram_type].SR2E == 0x22) &&
		      (pVBInfo->ECLKData[pVBInfo->ram_type].SR2F == 0x01))))
		    (((XGI340_ECLKData[pVBInfo->ram_type].SR2E == 0x1C) &&
		      (XGI340_ECLKData[pVBInfo->ram_type].SR2F == 0x01)) ||
		     ((XGI340_ECLKData[pVBInfo->ram_type].SR2E == 0x22) &&
		      (XGI340_ECLKData[pVBInfo->ram_type].SR2F == 0x01))))
			xgifb_reg_set(pVBInfo->P3c4,
				      0x32,
				      ((unsigned char) xgifb_reg_get(
+0 −1
Original line number Diff line number Diff line
@@ -24,7 +24,6 @@ static const unsigned short XGINew_VGA_DAC[] = {
void InitTo330Pointer(unsigned char ChipType, struct vb_device_info *pVBInfo)
{
	pVBInfo->MCLKData = XGI340New_MCLKData;
	pVBInfo->ECLKData = XGI340_ECLKData;
	pVBInfo->VCLKData = XGI_VCLKData;
	pVBInfo->VBVCLKData = XGI_VBVCLKData;
	pVBInfo->ScreenOffset = XGI330_ScreenOffset;
+0 −1
Original line number Diff line number Diff line
@@ -169,7 +169,6 @@ struct vb_device_info {
	unsigned char  SR22;
	unsigned char  SR25;
	struct SiS_MCLKData  *MCLKData;
	struct XGI_ECLKDataStruct  *ECLKData;

	unsigned char   *ScreenOffset;
	unsigned char   *pXGINew_DRAMTypeDefinition;
+1 −1
Original line number Diff line number Diff line
@@ -22,7 +22,7 @@ static struct SiS_MCLKData XGI27New_MCLKData[] = {
	{0x5c, 0x23, 0x01, 166}
};

static struct XGI_ECLKDataStruct XGI340_ECLKData[] = {
const struct XGI_ECLKDataStruct XGI340_ECLKData[] = {
	{0x5c, 0x23, 0x01, 166},
	{0x55, 0x84, 0x01, 123},
	{0x7C, 0x08, 0x01, 200},