Unverified Commit 990102a7 authored by Arnd Bergmann's avatar Arnd Bergmann
Browse files

Merge tag 'ti-k3-dt-for-v5.17' of... 

Merge tag 'ti-k3-dt-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into arm/dt

Devicetree changes for TI K3 platforms for v5.17 merge window:

* New Platforms:
  - J721s2 SoC, SoM and Common Processor Board support
* New features:
  - CAN support on AM64 EVM and SK
  - TimeSync Router on AM64
* Fixes:
  - Correct d-cache-sets info on J7200
  - Fix L2 cache-sets value for J721e/J7200/AM64
  - Fixes for dtbs_check warnings wrt serdes_ln_ctrl node on J721e/J7200
  - Disable McASP on IoT2050 board to fix dtbs_check warnings

* tag 'ti-k3-dt-for-v5.17' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux:
  arch: arm64: ti: Add support J721S2 Common Processor Board
  arm64: dts: ti: Add initial support for J721S2 System on Module
  arm64: dts: ti: Add initial support for J721S2 SoC
  dt-bindings: pinctrl: k3: Introduce pinmux definitions for J721S2
  dt-bindings: arm: ti: Add bindings for J721s2 SoC
  arm64: dts: ti: iot2050: Disable mcasp nodes at dtsi level
  arm64: dts: ti: k3-am642-evm/sk: Add support for main domain mcan nodes in EVM and disable them on SK
  arm64: dts: ti: k3-am64-main: Add support for MCAN
  arm64: dts: ti: k3-j721e-common-proc-board: Add support for mcu and main mcan nodes
  arm64: dts: ti: k3-j721e: Add support for MCAN nodes
  arm64: dts: ti: am654-base-board/am65-iot2050-common: Disable mcan nodes
  arm64: dts: ti: k3-am65-mcu: Add Support for MCAN
  arm64: dts: ti: k3-am64-main: add timesync router node
  arm64: dts: ti: k3-j7200: Correct the d-cache-sets info
  arm64: dts: ti: k3-j721e: Fix the L2 cache sets
  arm64: dts: ti: k3-j7200: Fix the L2 cache sets
  arm64: dts: ti: k3-am642: Fix the L2 cache sets
  arm64: dts: ti: j721e-main: Fix 'dtbs_check' in serdes_ln_ctrl node
  arm64: dts: ti: j7200-main: Fix 'dtbs_check' serdes_ln_ctrl node
  arm64: dts: ti: k3-j721e: correct cache-sets info

Link: https://lore.kernel.org/r/20211217172806.10023-2-vigneshr@ti.com


Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parents a862e818 effb32e9

Documentation/devicetree/bindings/arm/ti/k3.yaml

+6 −0
Original line number Diff line number Diff line
@@ -53,6 +53,12 @@ properties: 
              - ti,am642-sk

          - const: ti,am642



      - description: K3 J721s2 SoC

        items:

          - enum:

              - ti,j721s2-evm

          - const: ti,j721s2



additionalProperties: true



...

arch/arm64/boot/dts/ti/Makefile

+2 −0
Original line number Diff line number Diff line
@@ -17,5 +17,7 @@ dtb-$(CONFIG_ARCH_K3) += k3-j721e-sk.dtb 


dtb-$(CONFIG_ARCH_K3) += k3-j7200-common-proc-board.dtb



dtb-$(CONFIG_ARCH_K3) += k3-j721s2-common-proc-board.dtb



dtb-$(CONFIG_ARCH_K3) += k3-am642-evm.dtb

dtb-$(CONFIG_ARCH_K3) += k3-am642-sk.dtb

arch/arm64/boot/dts/ti/k3-am64-main.dtsi

+36 −0
Original line number Diff line number Diff line
@@ -564,6 +564,14 @@ cpts@39000000 { 
		ti,cpts-ext-ts-inputs = <8>;

	};



	timesync_router: pinctrl@a40000 {

		compatible = "pinctrl-single";

		reg = <0x0 0xa40000 0x0 0x800>;

		#pinctrl-cells = <1>;

		pinctrl-single,register-width = <32>;

		pinctrl-single,function-mask = <0x000107ff>;

	};



	usbss0: cdns-usb@f900000{

		compatible = "ti,am64-usb";

		reg = <0x00 0xf900000 0x00 0x100>;
@@ -1253,4 +1261,32 @@ icssg1_mdio: mdio@32400 { 
			bus_freq = <1000000>;

		};

	};



	main_mcan0: can@20701000 {

		compatible = "bosch,m_can";

		reg = <0x00 0x20701000 0x00 0x200>,

		      <0x00 0x20708000 0x00 0x8000>;

		reg-names = "m_can", "message_ram";

		power-domains = <&k3_pds 98 TI_SCI_PD_EXCLUSIVE>;

		clocks = <&k3_clks 98 5>, <&k3_clks 98 0>;

		clock-names = "hclk", "cclk";

		interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 156 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "int0", "int1";

		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;

	};



	main_mcan1: can@20711000 {

		compatible = "bosch,m_can";

		reg = <0x00 0x20711000 0x00 0x200>,

		      <0x00 0x20718000 0x00 0x8000>;

		reg-names = "m_can", "message_ram";

		power-domains = <&k3_pds 99 TI_SCI_PD_EXCLUSIVE>;

		clocks =  <&k3_clks 99 5>, <&k3_clks 99 0>;

		clock-names = "hclk", "cclk";

		interrupts = <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>,

			     <GIC_SPI 159 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "int0", "int1";

		bosch,mram-cfg = <0x0 128 64 64 64 64 32 32>;

	};

};

arch/arm64/boot/dts/ti/k3-am642-evm.dts

+40 −0
Original line number Diff line number Diff line
@@ -184,6 +184,20 @@ cpsw3g_phy3: ethernet-phy@3 { 
			};

		};

	};



	transceiver1: can-phy0 {

		compatible = "ti,tcan1042";

		#phy-cells = <0>;

		max-bitrate = <5000000>;

		standby-gpios = <&exp1 8 GPIO_ACTIVE_HIGH>;

	};



	transceiver2: can-phy1 {

		compatible = "ti,tcan1042";

		#phy-cells = <0>;

		max-bitrate = <5000000>;

		standby-gpios = <&exp1 9 GPIO_ACTIVE_HIGH>;

	};

};



&main_pmx0 {
@@ -294,6 +308,20 @@ main_ecap0_pins_default: main-ecap0-pins-default { 
			AM64X_IOPAD(0x0270, PIN_INPUT, 0) /* (D18) ECAP0_IN_APWM_OUT */

		>;

	};



	main_mcan0_pins_default: main-mcan0-pins-default {

		pinctrl-single,pins = <

			AM64X_IOPAD(0x0254, PIN_INPUT, 0) /* (B17) MCAN0_RX */

			AM64X_IOPAD(0x0250, PIN_OUTPUT, 0) /* (A17) MCAN0_TX */

		>;

	};



	main_mcan1_pins_default: main-mcan1-pins-default {

		pinctrl-single,pins = <

			AM64X_IOPAD(0x025c, PIN_INPUT, 0) /* (D17) MCAN1_RX */

			AM64X_IOPAD(0x0258, PIN_OUTPUT, 0) /* (C17) MCAN1_TX */

		>;

	};

};



&main_uart0 {
@@ -638,3 +666,15 @@ &icssg0_mdio { 
&icssg1_mdio {

	status = "disabled";

};



&main_mcan0 {

	pinctrl-names = "default";

	pinctrl-0 = <&main_mcan0_pins_default>;

	phys = <&transceiver1>;

};



&main_mcan1 {

	pinctrl-names = "default";

	pinctrl-0 = <&main_mcan1_pins_default>;

	phys = <&transceiver2>;

};

arch/arm64/boot/dts/ti/k3-am642-sk.dts

+8 −0
Original line number Diff line number Diff line
@@ -525,3 +525,11 @@ &icssg0_mdio { 
&icssg1_mdio {

	status = "disabled";

};



&main_mcan0 {

	status = "disabled";

};



&main_mcan1 {

	status = "disabled";

};