Loading arch/sparc64/kernel/entry.S +12 −0 Original line number Diff line number Diff line Loading @@ -1772,3 +1772,15 @@ sun4v_intr_settarget: retl nop /* %o0: type * %o1: queue paddr * %o2: num queue entries * * returns %o0: status */ .globl sun4v_cpu_qconf sun4v_cpu_qconf: mov HV_FAST_CPU_QCONF, %o5 ta HV_FAST_TRAP retl nop arch/sparc64/kernel/irq.c +7 −19 Original line number Diff line number Diff line Loading @@ -939,25 +939,13 @@ void init_irqwork_curcpu(void) static void __cpuinit register_one_mondo(unsigned long paddr, unsigned long type) { register unsigned long func __asm__("%o5"); register unsigned long arg0 __asm__("%o0"); register unsigned long arg1 __asm__("%o1"); register unsigned long arg2 __asm__("%o2"); func = HV_FAST_CPU_QCONF; arg0 = type; arg1 = paddr; arg2 = 128; /* XXX Implied by Niagara queue offsets. XXX */ __asm__ __volatile__("ta %8" : "=&r" (func), "=&r" (arg0), "=&r" (arg1), "=&r" (arg2) : "0" (func), "1" (arg0), "2" (arg1), "3" (arg2), "i" (HV_FAST_TRAP)); if (arg0 != HV_EOK) { prom_printf("SUN4V: cpu_qconf(%lu) failed with error %lu\n", type, func); unsigned long num_entries = 128; unsigned long status; status = sun4v_cpu_qconf(type, paddr, num_entries); if (status != HV_EOK) { prom_printf("SUN4V: sun4v_cpu_qconf(%lu:%lx:%lu) failed, " "err %lu\n", type, paddr, num_entries, status); prom_halt(); } } Loading include/asm-sparc64/hypervisor.h +6 −0 Original line number Diff line number Diff line Loading @@ -301,6 +301,12 @@ #define HV_CPU_QUEUE_RES_ERROR 0x3e #define HV_CPU_QUEUE_NONRES_ERROR 0x3f #ifndef __ASSEMBLY__ extern unsigned long sun4v_cpu_qconf(unsigned long type, unsigned long queue_paddr, unsigned long num_queue_entries); #endif /* cpu_qinfo() * TRAP: HV_FAST_TRAP * FUNCTION: HV_FAST_CPU_QINFO Loading Loading
arch/sparc64/kernel/entry.S +12 −0 Original line number Diff line number Diff line Loading @@ -1772,3 +1772,15 @@ sun4v_intr_settarget: retl nop /* %o0: type * %o1: queue paddr * %o2: num queue entries * * returns %o0: status */ .globl sun4v_cpu_qconf sun4v_cpu_qconf: mov HV_FAST_CPU_QCONF, %o5 ta HV_FAST_TRAP retl nop
arch/sparc64/kernel/irq.c +7 −19 Original line number Diff line number Diff line Loading @@ -939,25 +939,13 @@ void init_irqwork_curcpu(void) static void __cpuinit register_one_mondo(unsigned long paddr, unsigned long type) { register unsigned long func __asm__("%o5"); register unsigned long arg0 __asm__("%o0"); register unsigned long arg1 __asm__("%o1"); register unsigned long arg2 __asm__("%o2"); func = HV_FAST_CPU_QCONF; arg0 = type; arg1 = paddr; arg2 = 128; /* XXX Implied by Niagara queue offsets. XXX */ __asm__ __volatile__("ta %8" : "=&r" (func), "=&r" (arg0), "=&r" (arg1), "=&r" (arg2) : "0" (func), "1" (arg0), "2" (arg1), "3" (arg2), "i" (HV_FAST_TRAP)); if (arg0 != HV_EOK) { prom_printf("SUN4V: cpu_qconf(%lu) failed with error %lu\n", type, func); unsigned long num_entries = 128; unsigned long status; status = sun4v_cpu_qconf(type, paddr, num_entries); if (status != HV_EOK) { prom_printf("SUN4V: sun4v_cpu_qconf(%lu:%lx:%lu) failed, " "err %lu\n", type, paddr, num_entries, status); prom_halt(); } } Loading
include/asm-sparc64/hypervisor.h +6 −0 Original line number Diff line number Diff line Loading @@ -301,6 +301,12 @@ #define HV_CPU_QUEUE_RES_ERROR 0x3e #define HV_CPU_QUEUE_NONRES_ERROR 0x3f #ifndef __ASSEMBLY__ extern unsigned long sun4v_cpu_qconf(unsigned long type, unsigned long queue_paddr, unsigned long num_queue_entries); #endif /* cpu_qinfo() * TRAP: HV_FAST_TRAP * FUNCTION: HV_FAST_CPU_QINFO Loading