Commit 943f1723 authored by Peter Ujfalusi's avatar Peter Ujfalusi Committed by Nishanth Menon
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arm64: dts: ti: k3-am64-main: Enable DMA support



Add the nodes for DMSS INTA, BCDMA and PKTDMA to enable the use of the
DMAs in the system.

Signed-off-by: default avatarPeter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: default avatarDave Gerlach <d-gerlach@ti.com>
Signed-off-by: default avatarNishanth Menon <nm@ti.com>
Tested-by: default avatarKishon Vijay Abraham I <kishon@ti.com>
Reviewed-by: default avatarGrygorii Strashko <grygorii.strashko@ti.com>
Reviewed-by: default avatarVignesh Raghavendra <vigneshr@ti.com>
Link: https://lore.kernel.org/r/20210226144257.5470-5-d-gerlach@ti.com
parent 8abae938
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+73 −0
Original line number Diff line number Diff line
@@ -49,6 +49,8 @@ dmss: dmss {
		dma-ranges;
		ranges;

		ti,sci-dev-id = <25>;

		secure_proxy_main: mailbox@4d000000 {
			compatible = "ti,am654-secure-proxy";
			#mbox-cells = <1>;
@@ -59,6 +61,77 @@ secure_proxy_main: mailbox@4d000000 {
			interrupt-names = "rx_012";
			interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
		};

		inta_main_dmss: interrupt-controller@48000000 {
			compatible = "ti,sci-inta";
			reg = <0x00 0x48000000 0x00 0x100000>;
			#interrupt-cells = <0>;
			interrupt-controller;
			interrupt-parent = <&gic500>;
			msi-controller;
			ti,sci = <&dmsc>;
			ti,sci-dev-id = <28>;
			ti,interrupt-ranges = <4 68 36>;
			ti,unmapped-event-sources = <&main_bcdma>, <&main_pktdma>;
		};

		main_bcdma: dma-controller@485c0100 {
			compatible = "ti,am64-dmss-bcdma";
			reg = <0x00 0x485c0100 0x00 0x100>,
			      <0x00 0x4c000000 0x00 0x20000>,
			      <0x00 0x4a820000 0x00 0x20000>,
			      <0x00 0x4aa40000 0x00 0x20000>,
			      <0x00 0x4bc00000 0x00 0x100000>;
			reg-names = "gcfg", "bchanrt", "rchanrt", "tchanrt", "ringrt";
			msi-parent = <&inta_main_dmss>;
			#dma-cells = <3>;

			ti,sci = <&dmsc>;
			ti,sci-dev-id = <26>;
			ti,sci-rm-range-bchan = <0x20>; /* BLOCK_COPY_CHAN */
			ti,sci-rm-range-rchan = <0x21>; /* SPLIT_TR_RX_CHAN */
			ti,sci-rm-range-tchan = <0x22>; /* SPLIT_TR_TX_CHAN */
		};

		main_pktdma: dma-controller@485c0000 {
			compatible = "ti,am64-dmss-pktdma";
			reg = <0x00 0x485c0000 0x00 0x100>,
			      <0x00 0x4a800000 0x00 0x20000>,
			      <0x00 0x4aa00000 0x00 0x40000>,
			      <0x00 0x4b800000 0x00 0x400000>;
			reg-names = "gcfg", "rchanrt", "tchanrt", "ringrt";
			msi-parent = <&inta_main_dmss>;
			#dma-cells = <2>;

			ti,sci = <&dmsc>;
			ti,sci-dev-id = <30>;
			ti,sci-rm-range-tchan = <0x23>, /* UNMAPPED_TX_CHAN */
						<0x24>, /* CPSW_TX_CHAN */
						<0x25>, /* SAUL_TX_0_CHAN */
						<0x26>, /* SAUL_TX_1_CHAN */
						<0x27>, /* ICSSG_0_TX_CHAN */
						<0x28>; /* ICSSG_1_TX_CHAN */
			ti,sci-rm-range-tflow = <0x10>, /* RING_UNMAPPED_TX_CHAN */
						<0x11>, /* RING_CPSW_TX_CHAN */
						<0x12>, /* RING_SAUL_TX_0_CHAN */
						<0x13>, /* RING_SAUL_TX_1_CHAN */
						<0x14>, /* RING_ICSSG_0_TX_CHAN */
						<0x15>; /* RING_ICSSG_1_TX_CHAN */
			ti,sci-rm-range-rchan = <0x29>, /* UNMAPPED_RX_CHAN */
						<0x2b>, /* CPSW_RX_CHAN */
						<0x2d>, /* SAUL_RX_0_CHAN */
						<0x2f>, /* SAUL_RX_1_CHAN */
						<0x31>, /* SAUL_RX_2_CHAN */
						<0x33>, /* SAUL_RX_3_CHAN */
						<0x35>, /* ICSSG_0_RX_CHAN */
						<0x37>; /* ICSSG_1_RX_CHAN */
			ti,sci-rm-range-rflow = <0x2a>, /* FLOW_UNMAPPED_RX_CHAN */
						<0x2c>, /* FLOW_CPSW_RX_CHAN */
						<0x2e>, /* FLOW_SAUL_RX_0/1_CHAN */
						<0x32>, /* FLOW_SAUL_RX_2/3_CHAN */
						<0x36>, /* FLOW_ICSSG_0_RX_CHAN */
						<0x38>; /* FLOW_ICSSG_1_RX_CHAN */
		};
	};

	dmsc: dmsc@44043000 {