Commit 94106e0f authored by Mike Frysinger's avatar Mike Frysinger Committed by Bryan Wu
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Blackfin arch: do not allow L2 to be cached on BF561 SMP 



Signed-off-by: default avatarBryan Wu <cooloney@kernel.org>
parent 1ea99255

arch/blackfin/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -866,7 +866,7 @@ endchoice 


config BFIN_L2_CACHEABLE

	bool "Cache L2 SRAM"

	depends on (BFIN_DCACHE || BFIN_ICACHE) && (BF54x || BF561)

	depends on (BFIN_DCACHE || BFIN_ICACHE) && (BF54x || (BF561 && !SMP))

	default n

	help

	  Select to make L2 SRAM cacheable in L1 data and instruction cache.