Commit 931a0ba6 authored by Robin Murphy's avatar Robin Murphy Committed by Will Deacon
Browse files

iommu/arm-smmu: Report USF more clearly 



Although CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT is a welcome tool
for smoking out inadequate firmware, the failure mode is non-obvious
and can be confusing for end users. Add some special-case reporting of
Unidentified Stream Faults to help clarify this particular symptom.
Since we're adding yet another print to the mix, also break out an
explicit ratelimit state to make sure everything stays together (and
reduce the static storage footprint a little).

Reviewed-by: default avatarDouglas Anderson <dianders@chromium.org>
Signed-off-by: default avatarRobin Murphy <robin.murphy@arm.com>
Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent 696bcfb7

drivers/iommu/arm-smmu.c

+16 −5
Original line number Diff line number Diff line
@@ -36,6 +36,7 @@ 
#include <linux/pci.h>

#include <linux/platform_device.h>

#include <linux/pm_runtime.h>

#include <linux/ratelimit.h>

#include <linux/slab.h>



#include <linux/amba/bus.h>
@@ -477,6 +478,8 @@ static irqreturn_t arm_smmu_global_fault(int irq, void *dev) 
{

	u32 gfsr, gfsynr0, gfsynr1, gfsynr2;

	struct arm_smmu_device *smmu = dev;

	static DEFINE_RATELIMIT_STATE(rs, DEFAULT_RATELIMIT_INTERVAL,

				      DEFAULT_RATELIMIT_BURST);



	gfsr = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sGFSR);

	gfsynr0 = arm_smmu_gr0_read(smmu, ARM_SMMU_GR0_sGFSYNR0);
@@ -486,11 +489,19 @@ static irqreturn_t arm_smmu_global_fault(int irq, void *dev) 
	if (!gfsr)

		return IRQ_NONE;



	dev_err_ratelimited(smmu->dev,

	if (__ratelimit(&rs)) {

		if (IS_ENABLED(CONFIG_ARM_SMMU_DISABLE_BYPASS_BY_DEFAULT) &&

		    (gfsr & sGFSR_USF))

			dev_err(smmu->dev,

				"Blocked unknown Stream ID 0x%hx; boot with \"arm-smmu.disable_bypass=0\" to allow, but this may have security implications\n",

				(u16)gfsynr1);

		else

			dev_err(smmu->dev,

				"Unexpected global fault, this could be serious\n");

	dev_err_ratelimited(smmu->dev,

		dev_err(smmu->dev,

			"\tGFSR 0x%08x, GFSYNR0 0x%08x, GFSYNR1 0x%08x, GFSYNR2 0x%08x\n",

			gfsr, gfsynr0, gfsynr1, gfsynr2);

	}



	arm_smmu_gr0_write(smmu, ARM_SMMU_GR0_sGFSR, gfsr);

	return IRQ_HANDLED;

drivers/iommu/arm-smmu.h

+2 −0
Original line number Diff line number Diff line
@@ -79,6 +79,8 @@ 
#define ID7_MINOR			GENMASK(3, 0)



#define ARM_SMMU_GR0_sGFSR		0x48

#define sGFSR_USF			BIT(1)



#define ARM_SMMU_GR0_sGFSYNR0		0x50

#define ARM_SMMU_GR0_sGFSYNR1		0x54

#define ARM_SMMU_GR0_sGFSYNR2		0x58