Loading drivers/net/e1000/e1000_ethtool.c +25 −27 Original line number Diff line number Diff line Loading @@ -709,7 +709,6 @@ e1000_set_ringparam(struct net_device *netdev, } clear_bit(__E1000_RESETTING, &adapter->flags); return 0; err_setup_tx: e1000_free_all_rx_resources(adapter); Loading Loading @@ -894,16 +893,17 @@ e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data) *data = 0; /* NOTE: we don't test MSI interrupts here, yet */ /* Hook up test interrupt handler just for this test */ if (!request_irq(irq, &e1000_test_intr, IRQF_PROBE_SHARED, netdev->name, netdev)) { netdev->name, netdev)) shared_int = FALSE; } else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED, else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED, netdev->name, netdev)) { *data = 1; return -1; } DPRINTK(PROBE,INFO, "testing %s interrupt\n", DPRINTK(HW, INFO, "testing %s interrupt\n", (shared_int ? "shared" : "unshared")); /* Disable all the interrupts */ Loading Loading @@ -1269,11 +1269,10 @@ e1000_integrated_phy_loopback(struct e1000_adapter *adapter) e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140); /* autoneg off */ e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140); } else if (adapter->hw.phy_type == e1000_phy_gg82563) { } else if (adapter->hw.phy_type == e1000_phy_gg82563) e1000_write_phy_reg(&adapter->hw, GG82563_PHY_KMRN_MODE_CTRL, 0x1CC); } ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL); Loading Loading @@ -1301,9 +1300,9 @@ e1000_integrated_phy_loopback(struct e1000_adapter *adapter) } if (adapter->hw.media_type == e1000_media_type_copper && adapter->hw.phy_type == e1000_phy_m88) { adapter->hw.phy_type == e1000_phy_m88) ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */ } else { else { /* Set the ILOS bit on the fiber Nic is half * duplex link is detected. */ stat_reg = E1000_READ_REG(&adapter->hw, STATUS); Loading Loading @@ -1439,11 +1438,10 @@ e1000_loopback_cleanup(struct e1000_adapter *adapter) case e1000_82546_rev_3: default: hw->autoneg = TRUE; if (hw->phy_type == e1000_phy_gg82563) { if (hw->phy_type == e1000_phy_gg82563) e1000_write_phy_reg(hw, GG82563_PHY_KMRN_MODE_CTRL, 0x180); } e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg); if (phy_reg & MII_CR_LOOPBACK) { phy_reg &= ~MII_CR_LOOPBACK; Loading drivers/net/e1000/e1000_hw.c +513 −511 Original line number Diff line number Diff line Loading @@ -31,6 +31,7 @@ * Shared functions for accessing and configuring the MAC */ #include "e1000_hw.h" static int32_t e1000_set_phy_type(struct e1000_hw *hw); Loading Loading @@ -207,6 +208,7 @@ e1000_set_phy_type(struct e1000_hw *hw) return E1000_SUCCESS; } /****************************************************************************** * IGP phy init script - initializes the GbE PHY * Loading Loading @@ -912,7 +914,6 @@ e1000_init_hw(struct e1000_hw *hw) } if (hw->mac_type == e1000_82573) { uint32_t gcr = E1000_READ_REG(hw, GCR); gcr |= E1000_GCR_L1_ACT_WITHOUT_L0S_RX; Loading Loading @@ -1352,7 +1353,7 @@ e1000_copper_link_igp_setup(struct e1000_hw *hw) return ret_val; } /* Wait 10ms for MAC to configure PHY from eeprom settings */ /* Wait 15ms for MAC to configure PHY from eeprom settings */ msec_delay(15); if (hw->mac_type != e1000_ich8lan) { /* Configure activity LED after PHY reset */ Loading Loading @@ -1425,12 +1426,12 @@ e1000_copper_link_igp_setup(struct e1000_hw *hw) * resolution as hardware default. */ if (hw->autoneg_advertised == ADVERTISE_1000_FULL) { /* Disable SmartSpeed */ ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG, &phy_data); ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG, &phy_data); if (ret_val) return ret_val; phy_data &= ~IGP01E1000_PSCFR_SMART_SPEED; ret_val = e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG, ret_val = e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG, phy_data); if (ret_val) return ret_val; Loading Loading @@ -1600,9 +1601,9 @@ e1000_copper_link_ggp_setup(struct e1000_hw *hw) return ret_val; phy_data &= ~GG82563_KMCR_PASS_FALSE_CARRIER; ret_val = e1000_write_phy_reg(hw, GG82563_PHY_KMRN_MODE_CTRL, phy_data); if (ret_val) return ret_val; } Loading Loading @@ -1792,7 +1793,6 @@ e1000_copper_link_autoneg(struct e1000_hw *hw) return E1000_SUCCESS; } /****************************************************************************** * Config the MAC and the PHY after link is up. * 1) Set up the MAC to the current PHY speed/duplex Loading Loading @@ -2389,8 +2389,7 @@ e1000_phy_force_speed_duplex(struct e1000_hw *hw) return ret_val; if ((hw->mac_type == e1000_82544 || hw->mac_type == e1000_82543) && (!hw->autoneg) && (hw->forced_speed_duplex == e1000_10_full || (!hw->autoneg) && (hw->forced_speed_duplex == e1000_10_full || hw->forced_speed_duplex == e1000_10_half)) { ret_val = e1000_polarity_reversal_workaround(hw); if (ret_val) Loading Loading @@ -2602,7 +2601,8 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw) * configuration of the MAC to match the "fc" parameter. */ if (((hw->media_type == e1000_media_type_fiber) && (hw->autoneg_failed)) || ((hw->media_type == e1000_media_type_internal_serdes) && (hw->autoneg_failed)) || ((hw->media_type == e1000_media_type_internal_serdes) && (hw->autoneg_failed)) || ((hw->media_type == e1000_media_type_copper) && (!hw->autoneg))) { ret_val = e1000_force_mac_fc(hw); if (ret_val) { Loading Loading @@ -3207,8 +3207,10 @@ e1000_shift_out_mdi_bits(struct e1000_hw *hw, * shifted out to the PHY by setting the MDIO bit to "0" and then * raising and lowering the clock. */ if(data & mask) ctrl |= E1000_CTRL_MDIO; else ctrl &= ~E1000_CTRL_MDIO; if (data & mask) ctrl |= E1000_CTRL_MDIO; else ctrl &= ~E1000_CTRL_MDIO; E1000_WRITE_REG(hw, CTRL, ctrl); E1000_WRITE_FLUSH(hw); Loading Loading @@ -3264,7 +3266,8 @@ e1000_shift_in_mdi_bits(struct e1000_hw *hw) e1000_raise_mdi_clk(hw, &ctrl); ctrl = E1000_READ_REG(hw, CTRL); /* Check to see if we shifted in a "1". */ if(ctrl & E1000_CTRL_MDIO) data |= 1; if (ctrl & E1000_CTRL_MDIO) data |= 1; e1000_lower_mdi_clk(hw, &ctrl); } Loading Loading @@ -3582,7 +3585,7 @@ e1000_write_phy_reg_ex(struct e1000_hw *hw, E1000_WRITE_REG(hw, MDIC, mdic); /* Poll the ready bit to see if the MDI read completed */ for(i = 0; i < 640; i++) { for (i = 0; i < 641; i++) { udelay(5); mdic = E1000_READ_REG(hw, MDIC); if (mdic & E1000_MDIC_READY) break; Loading Loading @@ -3757,14 +3760,13 @@ e1000_phy_hw_reset(struct e1000_hw *hw) /* Wait for FW to finish PHY configuration. */ ret_val = e1000_get_phy_cfg_done(hw); if (ret_val != E1000_SUCCESS) return ret_val; e1000_release_software_semaphore(hw); if ((hw->mac_type == e1000_ich8lan) && (hw->phy_type == e1000_phy_igp_3)) { if ((hw->mac_type == e1000_ich8lan) && (hw->phy_type == e1000_phy_igp_3)) ret_val = e1000_init_lcd_from_nvm(hw); if (ret_val) return ret_val; } return ret_val; } Loading Loading @@ -3892,7 +3894,7 @@ e1000_kumeran_lock_loss_workaround(struct e1000_hw *hw) return E1000_SUCCESS; /* Make sure link is up before proceeding. If not just return. * Attempting this while link is negotiating fouls up link * Attempting this while link is negotiating fouled up link * stability */ ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data); ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data); Loading Loading @@ -4053,7 +4055,7 @@ e1000_phy_reset_dsp(struct e1000_hw *hw) * hw - Struct containing variables accessed by shared code * phy_info - PHY information structure ******************************************************************************/ static int32_t int32_t e1000_phy_igp_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info) { Loading Loading @@ -6133,6 +6135,7 @@ e1000_setup_led(struct e1000_hw *hw) return E1000_SUCCESS; } /****************************************************************************** * Used on 82571 and later Si that has LED blink bits. * Callers must use their own timer and should have already called Loading Loading @@ -6320,7 +6323,7 @@ e1000_led_off(struct e1000_hw *hw) * * hw - Struct containing variables accessed by shared code *****************************************************************************/ static void void e1000_clear_hw_cntrs(struct e1000_hw *hw) { volatile uint32_t temp; Loading Loading @@ -7572,7 +7575,7 @@ e1000_mng_host_if_write(struct e1000_hw * hw, uint8_t *buffer, { uint8_t *tmp; uint8_t *bufptr = buffer; uint32_t data; uint32_t data = 0; uint16_t remaining, i, j, prev_bytes; /* sum = only sum of the data and it is not checksum */ Loading Loading @@ -7675,8 +7678,7 @@ e1000_mng_write_cmd_header(struct e1000_hw * hw, * returns - E1000_SUCCESS for success. ****************************************************************************/ static int32_t e1000_mng_write_commit( struct e1000_hw * hw) e1000_mng_write_commit(struct e1000_hw * hw) { uint32_t hicr; Loading drivers/net/e1000/e1000_hw.h +13 −12 Original line number Diff line number Diff line Loading @@ -697,6 +697,7 @@ union e1000_rx_desc_packet_split { E1000_RXDEXT_STATERR_CXE | \ E1000_RXDEXT_STATERR_RXE) /* Transmit Descriptor */ struct e1000_tx_desc { uint64_t buffer_addr; /* Address of the descriptor's data buffer */ Loading drivers/net/e1000/e1000_main.c +2 −3 Original line number Diff line number Diff line Loading @@ -2439,11 +2439,10 @@ e1000_watchdog(unsigned long data) * disable receives in the ISR and * reset device here in the watchdog */ if (adapter->hw.mac_type == e1000_80003es2lan) { if (adapter->hw.mac_type == e1000_80003es2lan) /* reset device */ schedule_work(&adapter->reset_task); } } e1000_smartspeed(adapter); } Loading drivers/net/e1000/e1000.h +1 −1 File changed.Contains only whitespace changes. Show changes Loading
drivers/net/e1000/e1000_ethtool.c +25 −27 Original line number Diff line number Diff line Loading @@ -709,7 +709,6 @@ e1000_set_ringparam(struct net_device *netdev, } clear_bit(__E1000_RESETTING, &adapter->flags); return 0; err_setup_tx: e1000_free_all_rx_resources(adapter); Loading Loading @@ -894,16 +893,17 @@ e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data) *data = 0; /* NOTE: we don't test MSI interrupts here, yet */ /* Hook up test interrupt handler just for this test */ if (!request_irq(irq, &e1000_test_intr, IRQF_PROBE_SHARED, netdev->name, netdev)) { netdev->name, netdev)) shared_int = FALSE; } else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED, else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED, netdev->name, netdev)) { *data = 1; return -1; } DPRINTK(PROBE,INFO, "testing %s interrupt\n", DPRINTK(HW, INFO, "testing %s interrupt\n", (shared_int ? "shared" : "unshared")); /* Disable all the interrupts */ Loading Loading @@ -1269,11 +1269,10 @@ e1000_integrated_phy_loopback(struct e1000_adapter *adapter) e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140); /* autoneg off */ e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140); } else if (adapter->hw.phy_type == e1000_phy_gg82563) { } else if (adapter->hw.phy_type == e1000_phy_gg82563) e1000_write_phy_reg(&adapter->hw, GG82563_PHY_KMRN_MODE_CTRL, 0x1CC); } ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL); Loading Loading @@ -1301,9 +1300,9 @@ e1000_integrated_phy_loopback(struct e1000_adapter *adapter) } if (adapter->hw.media_type == e1000_media_type_copper && adapter->hw.phy_type == e1000_phy_m88) { adapter->hw.phy_type == e1000_phy_m88) ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */ } else { else { /* Set the ILOS bit on the fiber Nic is half * duplex link is detected. */ stat_reg = E1000_READ_REG(&adapter->hw, STATUS); Loading Loading @@ -1439,11 +1438,10 @@ e1000_loopback_cleanup(struct e1000_adapter *adapter) case e1000_82546_rev_3: default: hw->autoneg = TRUE; if (hw->phy_type == e1000_phy_gg82563) { if (hw->phy_type == e1000_phy_gg82563) e1000_write_phy_reg(hw, GG82563_PHY_KMRN_MODE_CTRL, 0x180); } e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg); if (phy_reg & MII_CR_LOOPBACK) { phy_reg &= ~MII_CR_LOOPBACK; Loading
drivers/net/e1000/e1000_hw.c +513 −511 Original line number Diff line number Diff line Loading @@ -31,6 +31,7 @@ * Shared functions for accessing and configuring the MAC */ #include "e1000_hw.h" static int32_t e1000_set_phy_type(struct e1000_hw *hw); Loading Loading @@ -207,6 +208,7 @@ e1000_set_phy_type(struct e1000_hw *hw) return E1000_SUCCESS; } /****************************************************************************** * IGP phy init script - initializes the GbE PHY * Loading Loading @@ -912,7 +914,6 @@ e1000_init_hw(struct e1000_hw *hw) } if (hw->mac_type == e1000_82573) { uint32_t gcr = E1000_READ_REG(hw, GCR); gcr |= E1000_GCR_L1_ACT_WITHOUT_L0S_RX; Loading Loading @@ -1352,7 +1353,7 @@ e1000_copper_link_igp_setup(struct e1000_hw *hw) return ret_val; } /* Wait 10ms for MAC to configure PHY from eeprom settings */ /* Wait 15ms for MAC to configure PHY from eeprom settings */ msec_delay(15); if (hw->mac_type != e1000_ich8lan) { /* Configure activity LED after PHY reset */ Loading Loading @@ -1425,12 +1426,12 @@ e1000_copper_link_igp_setup(struct e1000_hw *hw) * resolution as hardware default. */ if (hw->autoneg_advertised == ADVERTISE_1000_FULL) { /* Disable SmartSpeed */ ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG, &phy_data); ret_val = e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG, &phy_data); if (ret_val) return ret_val; phy_data &= ~IGP01E1000_PSCFR_SMART_SPEED; ret_val = e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG, ret_val = e1000_write_phy_reg(hw, IGP01E1000_PHY_PORT_CONFIG, phy_data); if (ret_val) return ret_val; Loading Loading @@ -1600,9 +1601,9 @@ e1000_copper_link_ggp_setup(struct e1000_hw *hw) return ret_val; phy_data &= ~GG82563_KMCR_PASS_FALSE_CARRIER; ret_val = e1000_write_phy_reg(hw, GG82563_PHY_KMRN_MODE_CTRL, phy_data); if (ret_val) return ret_val; } Loading Loading @@ -1792,7 +1793,6 @@ e1000_copper_link_autoneg(struct e1000_hw *hw) return E1000_SUCCESS; } /****************************************************************************** * Config the MAC and the PHY after link is up. * 1) Set up the MAC to the current PHY speed/duplex Loading Loading @@ -2389,8 +2389,7 @@ e1000_phy_force_speed_duplex(struct e1000_hw *hw) return ret_val; if ((hw->mac_type == e1000_82544 || hw->mac_type == e1000_82543) && (!hw->autoneg) && (hw->forced_speed_duplex == e1000_10_full || (!hw->autoneg) && (hw->forced_speed_duplex == e1000_10_full || hw->forced_speed_duplex == e1000_10_half)) { ret_val = e1000_polarity_reversal_workaround(hw); if (ret_val) Loading Loading @@ -2602,7 +2601,8 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw) * configuration of the MAC to match the "fc" parameter. */ if (((hw->media_type == e1000_media_type_fiber) && (hw->autoneg_failed)) || ((hw->media_type == e1000_media_type_internal_serdes) && (hw->autoneg_failed)) || ((hw->media_type == e1000_media_type_internal_serdes) && (hw->autoneg_failed)) || ((hw->media_type == e1000_media_type_copper) && (!hw->autoneg))) { ret_val = e1000_force_mac_fc(hw); if (ret_val) { Loading Loading @@ -3207,8 +3207,10 @@ e1000_shift_out_mdi_bits(struct e1000_hw *hw, * shifted out to the PHY by setting the MDIO bit to "0" and then * raising and lowering the clock. */ if(data & mask) ctrl |= E1000_CTRL_MDIO; else ctrl &= ~E1000_CTRL_MDIO; if (data & mask) ctrl |= E1000_CTRL_MDIO; else ctrl &= ~E1000_CTRL_MDIO; E1000_WRITE_REG(hw, CTRL, ctrl); E1000_WRITE_FLUSH(hw); Loading Loading @@ -3264,7 +3266,8 @@ e1000_shift_in_mdi_bits(struct e1000_hw *hw) e1000_raise_mdi_clk(hw, &ctrl); ctrl = E1000_READ_REG(hw, CTRL); /* Check to see if we shifted in a "1". */ if(ctrl & E1000_CTRL_MDIO) data |= 1; if (ctrl & E1000_CTRL_MDIO) data |= 1; e1000_lower_mdi_clk(hw, &ctrl); } Loading Loading @@ -3582,7 +3585,7 @@ e1000_write_phy_reg_ex(struct e1000_hw *hw, E1000_WRITE_REG(hw, MDIC, mdic); /* Poll the ready bit to see if the MDI read completed */ for(i = 0; i < 640; i++) { for (i = 0; i < 641; i++) { udelay(5); mdic = E1000_READ_REG(hw, MDIC); if (mdic & E1000_MDIC_READY) break; Loading Loading @@ -3757,14 +3760,13 @@ e1000_phy_hw_reset(struct e1000_hw *hw) /* Wait for FW to finish PHY configuration. */ ret_val = e1000_get_phy_cfg_done(hw); if (ret_val != E1000_SUCCESS) return ret_val; e1000_release_software_semaphore(hw); if ((hw->mac_type == e1000_ich8lan) && (hw->phy_type == e1000_phy_igp_3)) { if ((hw->mac_type == e1000_ich8lan) && (hw->phy_type == e1000_phy_igp_3)) ret_val = e1000_init_lcd_from_nvm(hw); if (ret_val) return ret_val; } return ret_val; } Loading Loading @@ -3892,7 +3894,7 @@ e1000_kumeran_lock_loss_workaround(struct e1000_hw *hw) return E1000_SUCCESS; /* Make sure link is up before proceeding. If not just return. * Attempting this while link is negotiating fouls up link * Attempting this while link is negotiating fouled up link * stability */ ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data); ret_val = e1000_read_phy_reg(hw, PHY_STATUS, &phy_data); Loading Loading @@ -4053,7 +4055,7 @@ e1000_phy_reset_dsp(struct e1000_hw *hw) * hw - Struct containing variables accessed by shared code * phy_info - PHY information structure ******************************************************************************/ static int32_t int32_t e1000_phy_igp_get_info(struct e1000_hw *hw, struct e1000_phy_info *phy_info) { Loading Loading @@ -6133,6 +6135,7 @@ e1000_setup_led(struct e1000_hw *hw) return E1000_SUCCESS; } /****************************************************************************** * Used on 82571 and later Si that has LED blink bits. * Callers must use their own timer and should have already called Loading Loading @@ -6320,7 +6323,7 @@ e1000_led_off(struct e1000_hw *hw) * * hw - Struct containing variables accessed by shared code *****************************************************************************/ static void void e1000_clear_hw_cntrs(struct e1000_hw *hw) { volatile uint32_t temp; Loading Loading @@ -7572,7 +7575,7 @@ e1000_mng_host_if_write(struct e1000_hw * hw, uint8_t *buffer, { uint8_t *tmp; uint8_t *bufptr = buffer; uint32_t data; uint32_t data = 0; uint16_t remaining, i, j, prev_bytes; /* sum = only sum of the data and it is not checksum */ Loading Loading @@ -7675,8 +7678,7 @@ e1000_mng_write_cmd_header(struct e1000_hw * hw, * returns - E1000_SUCCESS for success. ****************************************************************************/ static int32_t e1000_mng_write_commit( struct e1000_hw * hw) e1000_mng_write_commit(struct e1000_hw * hw) { uint32_t hicr; Loading
drivers/net/e1000/e1000_hw.h +13 −12 Original line number Diff line number Diff line Loading @@ -697,6 +697,7 @@ union e1000_rx_desc_packet_split { E1000_RXDEXT_STATERR_CXE | \ E1000_RXDEXT_STATERR_RXE) /* Transmit Descriptor */ struct e1000_tx_desc { uint64_t buffer_addr; /* Address of the descriptor's data buffer */ Loading
drivers/net/e1000/e1000_main.c +2 −3 Original line number Diff line number Diff line Loading @@ -2439,11 +2439,10 @@ e1000_watchdog(unsigned long data) * disable receives in the ISR and * reset device here in the watchdog */ if (adapter->hw.mac_type == e1000_80003es2lan) { if (adapter->hw.mac_type == e1000_80003es2lan) /* reset device */ schedule_work(&adapter->reset_task); } } e1000_smartspeed(adapter); } Loading