Loading drivers/gpu/drm/nouveau/core/engine/disp/nv50.h +10 −0 Original line number Diff line number Diff line Loading @@ -26,6 +26,12 @@ struct nv50_disp_priv { int (*power)(struct nv50_disp_priv *, int sor, u32 data); int (*hda_eld)(struct nv50_disp_priv *, int sor, u8 *, u32); int (*hdmi)(struct nv50_disp_priv *, int head, int sor, u32); int (*dp_train_init)(struct nv50_disp_priv *, int sor, int link, int head, u16 type, u16 mask, u32 data, struct dcb_output *); int (*dp_train_fini)(struct nv50_disp_priv *, int sor, int link, int head, u16 type, u16 mask, u32 data, struct dcb_output *); int (*dp_train)(struct nv50_disp_priv *, int sor, int link, u16 type, u16 mask, u32 data, struct dcb_output *); Loading Loading @@ -57,6 +63,10 @@ int nvd0_hdmi_ctrl(struct nv50_disp_priv *, int, int, u32); int nv50_sor_mthd(struct nouveau_object *, u32, void *, u32); int nv50_sor_power(struct nv50_disp_priv *, int, u32); int nv94_sor_dp_train_init(struct nv50_disp_priv *, int, int, int, u16, u16, u32, struct dcb_output *); int nv94_sor_dp_train_fini(struct nv50_disp_priv *, int, int, int, u16, u16, u32, struct dcb_output *); int nv94_sor_dp_train(struct nv50_disp_priv *, int, int, u16, u16, u32, struct dcb_output *); int nv94_sor_dp_lnkctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32, Loading drivers/gpu/drm/nouveau/core/engine/disp/nv94.c +2 −0 Original line number Diff line number Diff line Loading @@ -87,6 +87,8 @@ nv94_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, priv->sor.power = nv50_sor_power; priv->sor.hdmi = nv84_hdmi_ctrl; priv->sor.dp_train = nv94_sor_dp_train; priv->sor.dp_train_init = nv94_sor_dp_train_init; priv->sor.dp_train_fini = nv94_sor_dp_train_fini; priv->sor.dp_lnkctl = nv94_sor_dp_lnkctl; priv->sor.dp_drvctl = nv94_sor_dp_drvctl; Loading drivers/gpu/drm/nouveau/core/engine/disp/nva3.c +2 −0 Original line number Diff line number Diff line Loading @@ -89,6 +89,8 @@ nva3_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, priv->sor.hda_eld = nva3_hda_eld; priv->sor.hdmi = nva3_hdmi_ctrl; priv->sor.dp_train = nv94_sor_dp_train; priv->sor.dp_train_init = nv94_sor_dp_train_init; priv->sor.dp_train_fini = nv94_sor_dp_train_fini; priv->sor.dp_lnkctl = nv94_sor_dp_lnkctl; priv->sor.dp_drvctl = nv94_sor_dp_drvctl; Loading drivers/gpu/drm/nouveau/core/engine/disp/nvd0.c +2 −0 Original line number Diff line number Diff line Loading @@ -951,6 +951,8 @@ nvd0_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, priv->sor.hda_eld = nvd0_hda_eld; priv->sor.hdmi = nvd0_hdmi_ctrl; priv->sor.dp_train = nvd0_sor_dp_train; priv->sor.dp_train_init = nv94_sor_dp_train_init; priv->sor.dp_train_fini = nv94_sor_dp_train_fini; priv->sor.dp_lnkctl = nvd0_sor_dp_lnkctl; priv->sor.dp_drvctl = nvd0_sor_dp_drvctl; Loading drivers/gpu/drm/nouveau/core/engine/disp/nve0.c +2 −0 Original line number Diff line number Diff line Loading @@ -72,6 +72,8 @@ nve0_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, priv->sor.hda_eld = nvd0_hda_eld; priv->sor.hdmi = nvd0_hdmi_ctrl; priv->sor.dp_train = nvd0_sor_dp_train; priv->sor.dp_train_init = nv94_sor_dp_train_init; priv->sor.dp_train_fini = nv94_sor_dp_train_fini; priv->sor.dp_lnkctl = nvd0_sor_dp_lnkctl; priv->sor.dp_drvctl = nvd0_sor_dp_drvctl; Loading Loading
drivers/gpu/drm/nouveau/core/engine/disp/nv50.h +10 −0 Original line number Diff line number Diff line Loading @@ -26,6 +26,12 @@ struct nv50_disp_priv { int (*power)(struct nv50_disp_priv *, int sor, u32 data); int (*hda_eld)(struct nv50_disp_priv *, int sor, u8 *, u32); int (*hdmi)(struct nv50_disp_priv *, int head, int sor, u32); int (*dp_train_init)(struct nv50_disp_priv *, int sor, int link, int head, u16 type, u16 mask, u32 data, struct dcb_output *); int (*dp_train_fini)(struct nv50_disp_priv *, int sor, int link, int head, u16 type, u16 mask, u32 data, struct dcb_output *); int (*dp_train)(struct nv50_disp_priv *, int sor, int link, u16 type, u16 mask, u32 data, struct dcb_output *); Loading Loading @@ -57,6 +63,10 @@ int nvd0_hdmi_ctrl(struct nv50_disp_priv *, int, int, u32); int nv50_sor_mthd(struct nouveau_object *, u32, void *, u32); int nv50_sor_power(struct nv50_disp_priv *, int, u32); int nv94_sor_dp_train_init(struct nv50_disp_priv *, int, int, int, u16, u16, u32, struct dcb_output *); int nv94_sor_dp_train_fini(struct nv50_disp_priv *, int, int, int, u16, u16, u32, struct dcb_output *); int nv94_sor_dp_train(struct nv50_disp_priv *, int, int, u16, u16, u32, struct dcb_output *); int nv94_sor_dp_lnkctl(struct nv50_disp_priv *, int, int, int, u16, u16, u32, Loading
drivers/gpu/drm/nouveau/core/engine/disp/nv94.c +2 −0 Original line number Diff line number Diff line Loading @@ -87,6 +87,8 @@ nv94_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, priv->sor.power = nv50_sor_power; priv->sor.hdmi = nv84_hdmi_ctrl; priv->sor.dp_train = nv94_sor_dp_train; priv->sor.dp_train_init = nv94_sor_dp_train_init; priv->sor.dp_train_fini = nv94_sor_dp_train_fini; priv->sor.dp_lnkctl = nv94_sor_dp_lnkctl; priv->sor.dp_drvctl = nv94_sor_dp_drvctl; Loading
drivers/gpu/drm/nouveau/core/engine/disp/nva3.c +2 −0 Original line number Diff line number Diff line Loading @@ -89,6 +89,8 @@ nva3_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, priv->sor.hda_eld = nva3_hda_eld; priv->sor.hdmi = nva3_hdmi_ctrl; priv->sor.dp_train = nv94_sor_dp_train; priv->sor.dp_train_init = nv94_sor_dp_train_init; priv->sor.dp_train_fini = nv94_sor_dp_train_fini; priv->sor.dp_lnkctl = nv94_sor_dp_lnkctl; priv->sor.dp_drvctl = nv94_sor_dp_drvctl; Loading
drivers/gpu/drm/nouveau/core/engine/disp/nvd0.c +2 −0 Original line number Diff line number Diff line Loading @@ -951,6 +951,8 @@ nvd0_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, priv->sor.hda_eld = nvd0_hda_eld; priv->sor.hdmi = nvd0_hdmi_ctrl; priv->sor.dp_train = nvd0_sor_dp_train; priv->sor.dp_train_init = nv94_sor_dp_train_init; priv->sor.dp_train_fini = nv94_sor_dp_train_fini; priv->sor.dp_lnkctl = nvd0_sor_dp_lnkctl; priv->sor.dp_drvctl = nvd0_sor_dp_drvctl; Loading
drivers/gpu/drm/nouveau/core/engine/disp/nve0.c +2 −0 Original line number Diff line number Diff line Loading @@ -72,6 +72,8 @@ nve0_disp_ctor(struct nouveau_object *parent, struct nouveau_object *engine, priv->sor.hda_eld = nvd0_hda_eld; priv->sor.hdmi = nvd0_hdmi_ctrl; priv->sor.dp_train = nvd0_sor_dp_train; priv->sor.dp_train_init = nv94_sor_dp_train_init; priv->sor.dp_train_fini = nv94_sor_dp_train_fini; priv->sor.dp_lnkctl = nvd0_sor_dp_lnkctl; priv->sor.dp_drvctl = nvd0_sor_dp_drvctl; Loading