Loading drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g84.c +4 −4 Original line number Diff line number Diff line Loading @@ -27,11 +27,11 @@ #include <subdev/bios/init.h> static u64 g84_devinit_disable(struct nvkm_devinit *devinit) g84_devinit_disable(struct nvkm_devinit *init) { struct nv50_devinit *init = (void *)devinit; u32 r001540 = nv_rd32(init, 0x001540); u32 r00154c = nv_rd32(init, 0x00154c); struct nvkm_device *device = init->subdev.device; u32 r001540 = nvkm_rd32(device, 0x001540); u32 r00154c = nvkm_rd32(device, 0x00154c); u64 disable = 0ULL; if (!(r001540 & 0x40000000)) { Loading drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g98.c +4 −4 Original line number Diff line number Diff line Loading @@ -27,11 +27,11 @@ #include <subdev/bios/init.h> static u64 g98_devinit_disable(struct nvkm_devinit *devinit) g98_devinit_disable(struct nvkm_devinit *init) { struct nv50_devinit *init = (void *)devinit; u32 r001540 = nv_rd32(init, 0x001540); u32 r00154c = nv_rd32(init, 0x00154c); struct nvkm_device *device = init->subdev.device; u32 r001540 = nvkm_rd32(device, 0x001540); u32 r00154c = nvkm_rd32(device, 0x00154c); u64 disable = 0ULL; if (!(r001540 & 0x40000000)) { Loading drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c +11 −11 Original line number Diff line number Diff line Loading @@ -29,19 +29,19 @@ #include <subdev/clk/pll.h> int gf100_devinit_pll_set(struct nvkm_devinit *devinit, u32 type, u32 freq) gf100_devinit_pll_set(struct nvkm_devinit *init, u32 type, u32 freq) { struct nv50_devinit *init = (void *)devinit; struct nvkm_bios *bios = nvkm_bios(init); struct nvkm_subdev *subdev = &init->subdev; struct nvkm_device *device = subdev->device; struct nvbios_pll info; int N, fN, M, P; int ret; ret = nvbios_pll_parse(bios, type, &info); ret = nvbios_pll_parse(device->bios, type, &info); if (ret) return ret; ret = gt215_pll_calc(nv_subdev(devinit), &info, freq, &N, &fN, &M, &P); ret = gt215_pll_calc(subdev, &info, freq, &N, &fN, &M, &P); if (ret < 0) return ret; Loading @@ -50,9 +50,9 @@ gf100_devinit_pll_set(struct nvkm_devinit *devinit, u32 type, u32 freq) case PLL_VPLL1: case PLL_VPLL2: case PLL_VPLL3: nv_mask(init, info.reg + 0x0c, 0x00000000, 0x00000100); nv_wr32(init, info.reg + 0x04, (P << 16) | (N << 8) | M); nv_wr32(init, info.reg + 0x10, fN << 16); nvkm_mask(device, info.reg + 0x0c, 0x00000000, 0x00000100); nvkm_wr32(device, info.reg + 0x04, (P << 16) | (N << 8) | M); nvkm_wr32(device, info.reg + 0x10, fN << 16); break; default: nv_warn(init, "0x%08x/%dKhz unimplemented\n", type, freq); Loading @@ -64,10 +64,10 @@ gf100_devinit_pll_set(struct nvkm_devinit *devinit, u32 type, u32 freq) } static u64 gf100_devinit_disable(struct nvkm_devinit *devinit) gf100_devinit_disable(struct nvkm_devinit *init) { struct nv50_devinit *init = (void *)devinit; u32 r022500 = nv_rd32(init, 0x022500); struct nvkm_device *device = init->subdev.device; u32 r022500 = nvkm_rd32(device, 0x022500); u64 disable = 0ULL; if (r022500 & 0x00000001) Loading drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.c +4 −4 Original line number Diff line number Diff line Loading @@ -27,11 +27,11 @@ #include <subdev/bios/init.h> u64 gm107_devinit_disable(struct nvkm_devinit *devinit) gm107_devinit_disable(struct nvkm_devinit *init) { struct nv50_devinit *init = (void *)devinit; u32 r021c00 = nv_rd32(init, 0x021c00); u32 r021c04 = nv_rd32(init, 0x021c04); struct nvkm_device *device = init->subdev.device; u32 r021c00 = nvkm_rd32(device, 0x021c00); u32 r021c04 = nvkm_rd32(device, 0x021c04); u64 disable = 0ULL; if (r021c00 & 0x00000001) Loading drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm204.c +26 −21 Original line number Diff line number Diff line Loading @@ -30,18 +30,19 @@ static void pmu_code(struct nv50_devinit *init, u32 pmu, u32 img, u32 len, bool sec) { struct nvkm_bios *bios = nvkm_bios(init); struct nvkm_device *device = init->base.subdev.device; struct nvkm_bios *bios = device->bios; int i; nv_wr32(init, 0x10a180, 0x01000000 | (sec ? 0x10000000 : 0) | pmu); nvkm_wr32(device, 0x10a180, 0x01000000 | (sec ? 0x10000000 : 0) | pmu); for (i = 0; i < len; i += 4) { if ((i & 0xff) == 0) nv_wr32(init, 0x10a188, (pmu + i) >> 8); nv_wr32(init, 0x10a184, nv_ro32(bios, img + i)); nvkm_wr32(device, 0x10a188, (pmu + i) >> 8); nvkm_wr32(device, 0x10a184, nv_ro32(bios, img + i)); } while (i & 0xff) { nv_wr32(init, 0x10a184, 0x00000000); nvkm_wr32(device, 0x10a184, 0x00000000); i += 4; } } Loading @@ -49,28 +50,31 @@ pmu_code(struct nv50_devinit *init, u32 pmu, u32 img, u32 len, bool sec) static void pmu_data(struct nv50_devinit *init, u32 pmu, u32 img, u32 len) { struct nvkm_bios *bios = nvkm_bios(init); struct nvkm_device *device = init->base.subdev.device; struct nvkm_bios *bios = device->bios; int i; nv_wr32(init, 0x10a1c0, 0x01000000 | pmu); nvkm_wr32(device, 0x10a1c0, 0x01000000 | pmu); for (i = 0; i < len; i += 4) nv_wr32(init, 0x10a1c4, nv_ro32(bios, img + i)); nvkm_wr32(device, 0x10a1c4, nv_ro32(bios, img + i)); } static u32 pmu_args(struct nv50_devinit *init, u32 argp, u32 argi) { nv_wr32(init, 0x10a1c0, argp); nv_wr32(init, 0x10a1c0, nv_rd32(init, 0x10a1c4) + argi); return nv_rd32(init, 0x10a1c4); struct nvkm_device *device = init->base.subdev.device; nvkm_wr32(device, 0x10a1c0, argp); nvkm_wr32(device, 0x10a1c0, nvkm_rd32(device, 0x10a1c4) + argi); return nvkm_rd32(device, 0x10a1c4); } static void pmu_exec(struct nv50_devinit *init, u32 init_addr) { nv_wr32(init, 0x10a104, init_addr); nv_wr32(init, 0x10a10c, 0x00000000); nv_wr32(init, 0x10a100, 0x00000002); struct nvkm_device *device = init->base.subdev.device; nvkm_wr32(device, 0x10a104, init_addr); nvkm_wr32(device, 0x10a10c, 0x00000000); nvkm_wr32(device, 0x10a100, 0x00000002); } static int Loading Loading @@ -105,7 +109,8 @@ static int gm204_devinit_post(struct nvkm_subdev *subdev, bool post) { struct nv50_devinit *init = (void *)nvkm_devinit(subdev); struct nvkm_bios *bios = nvkm_bios(init); struct nvkm_device *device = init->base.subdev.device; struct nvkm_bios *bios = device->bios; struct bit_entry bit_I; u32 exec, args; int ret; Loading @@ -118,10 +123,10 @@ gm204_devinit_post(struct nvkm_subdev *subdev, bool post) /* reset PMU and load init table parser ucode */ if (post) { nv_mask(init, 0x000200, 0x00002000, 0x00000000); nv_mask(init, 0x000200, 0x00002000, 0x00002000); nv_rd32(init, 0x000200); while (nv_rd32(init, 0x10a10c) & 0x00000006) { nvkm_mask(device, 0x000200, 0x00002000, 0x00000000); nvkm_mask(device, 0x000200, 0x00002000, 0x00002000); nvkm_rd32(device, 0x000200); while (nvkm_rd32(device, 0x10a10c) & 0x00000006) { } } Loading @@ -147,9 +152,9 @@ gm204_devinit_post(struct nvkm_subdev *subdev, bool post) /* execute init tables */ if (post) { nv_wr32(init, 0x10a040, 0x00005000); nvkm_wr32(device, 0x10a040, 0x00005000); pmu_exec(init, exec); while (!(nv_rd32(init, 0x10a040) & 0x00002000)) { while (!(nvkm_rd32(device, 0x10a040) & 0x00002000)) { } } Loading Loading
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g84.c +4 −4 Original line number Diff line number Diff line Loading @@ -27,11 +27,11 @@ #include <subdev/bios/init.h> static u64 g84_devinit_disable(struct nvkm_devinit *devinit) g84_devinit_disable(struct nvkm_devinit *init) { struct nv50_devinit *init = (void *)devinit; u32 r001540 = nv_rd32(init, 0x001540); u32 r00154c = nv_rd32(init, 0x00154c); struct nvkm_device *device = init->subdev.device; u32 r001540 = nvkm_rd32(device, 0x001540); u32 r00154c = nvkm_rd32(device, 0x00154c); u64 disable = 0ULL; if (!(r001540 & 0x40000000)) { Loading
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/g98.c +4 −4 Original line number Diff line number Diff line Loading @@ -27,11 +27,11 @@ #include <subdev/bios/init.h> static u64 g98_devinit_disable(struct nvkm_devinit *devinit) g98_devinit_disable(struct nvkm_devinit *init) { struct nv50_devinit *init = (void *)devinit; u32 r001540 = nv_rd32(init, 0x001540); u32 r00154c = nv_rd32(init, 0x00154c); struct nvkm_device *device = init->subdev.device; u32 r001540 = nvkm_rd32(device, 0x001540); u32 r00154c = nvkm_rd32(device, 0x00154c); u64 disable = 0ULL; if (!(r001540 & 0x40000000)) { Loading
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gf100.c +11 −11 Original line number Diff line number Diff line Loading @@ -29,19 +29,19 @@ #include <subdev/clk/pll.h> int gf100_devinit_pll_set(struct nvkm_devinit *devinit, u32 type, u32 freq) gf100_devinit_pll_set(struct nvkm_devinit *init, u32 type, u32 freq) { struct nv50_devinit *init = (void *)devinit; struct nvkm_bios *bios = nvkm_bios(init); struct nvkm_subdev *subdev = &init->subdev; struct nvkm_device *device = subdev->device; struct nvbios_pll info; int N, fN, M, P; int ret; ret = nvbios_pll_parse(bios, type, &info); ret = nvbios_pll_parse(device->bios, type, &info); if (ret) return ret; ret = gt215_pll_calc(nv_subdev(devinit), &info, freq, &N, &fN, &M, &P); ret = gt215_pll_calc(subdev, &info, freq, &N, &fN, &M, &P); if (ret < 0) return ret; Loading @@ -50,9 +50,9 @@ gf100_devinit_pll_set(struct nvkm_devinit *devinit, u32 type, u32 freq) case PLL_VPLL1: case PLL_VPLL2: case PLL_VPLL3: nv_mask(init, info.reg + 0x0c, 0x00000000, 0x00000100); nv_wr32(init, info.reg + 0x04, (P << 16) | (N << 8) | M); nv_wr32(init, info.reg + 0x10, fN << 16); nvkm_mask(device, info.reg + 0x0c, 0x00000000, 0x00000100); nvkm_wr32(device, info.reg + 0x04, (P << 16) | (N << 8) | M); nvkm_wr32(device, info.reg + 0x10, fN << 16); break; default: nv_warn(init, "0x%08x/%dKhz unimplemented\n", type, freq); Loading @@ -64,10 +64,10 @@ gf100_devinit_pll_set(struct nvkm_devinit *devinit, u32 type, u32 freq) } static u64 gf100_devinit_disable(struct nvkm_devinit *devinit) gf100_devinit_disable(struct nvkm_devinit *init) { struct nv50_devinit *init = (void *)devinit; u32 r022500 = nv_rd32(init, 0x022500); struct nvkm_device *device = init->subdev.device; u32 r022500 = nvkm_rd32(device, 0x022500); u64 disable = 0ULL; if (r022500 & 0x00000001) Loading
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm107.c +4 −4 Original line number Diff line number Diff line Loading @@ -27,11 +27,11 @@ #include <subdev/bios/init.h> u64 gm107_devinit_disable(struct nvkm_devinit *devinit) gm107_devinit_disable(struct nvkm_devinit *init) { struct nv50_devinit *init = (void *)devinit; u32 r021c00 = nv_rd32(init, 0x021c00); u32 r021c04 = nv_rd32(init, 0x021c04); struct nvkm_device *device = init->subdev.device; u32 r021c00 = nvkm_rd32(device, 0x021c00); u32 r021c04 = nvkm_rd32(device, 0x021c04); u64 disable = 0ULL; if (r021c00 & 0x00000001) Loading
drivers/gpu/drm/nouveau/nvkm/subdev/devinit/gm204.c +26 −21 Original line number Diff line number Diff line Loading @@ -30,18 +30,19 @@ static void pmu_code(struct nv50_devinit *init, u32 pmu, u32 img, u32 len, bool sec) { struct nvkm_bios *bios = nvkm_bios(init); struct nvkm_device *device = init->base.subdev.device; struct nvkm_bios *bios = device->bios; int i; nv_wr32(init, 0x10a180, 0x01000000 | (sec ? 0x10000000 : 0) | pmu); nvkm_wr32(device, 0x10a180, 0x01000000 | (sec ? 0x10000000 : 0) | pmu); for (i = 0; i < len; i += 4) { if ((i & 0xff) == 0) nv_wr32(init, 0x10a188, (pmu + i) >> 8); nv_wr32(init, 0x10a184, nv_ro32(bios, img + i)); nvkm_wr32(device, 0x10a188, (pmu + i) >> 8); nvkm_wr32(device, 0x10a184, nv_ro32(bios, img + i)); } while (i & 0xff) { nv_wr32(init, 0x10a184, 0x00000000); nvkm_wr32(device, 0x10a184, 0x00000000); i += 4; } } Loading @@ -49,28 +50,31 @@ pmu_code(struct nv50_devinit *init, u32 pmu, u32 img, u32 len, bool sec) static void pmu_data(struct nv50_devinit *init, u32 pmu, u32 img, u32 len) { struct nvkm_bios *bios = nvkm_bios(init); struct nvkm_device *device = init->base.subdev.device; struct nvkm_bios *bios = device->bios; int i; nv_wr32(init, 0x10a1c0, 0x01000000 | pmu); nvkm_wr32(device, 0x10a1c0, 0x01000000 | pmu); for (i = 0; i < len; i += 4) nv_wr32(init, 0x10a1c4, nv_ro32(bios, img + i)); nvkm_wr32(device, 0x10a1c4, nv_ro32(bios, img + i)); } static u32 pmu_args(struct nv50_devinit *init, u32 argp, u32 argi) { nv_wr32(init, 0x10a1c0, argp); nv_wr32(init, 0x10a1c0, nv_rd32(init, 0x10a1c4) + argi); return nv_rd32(init, 0x10a1c4); struct nvkm_device *device = init->base.subdev.device; nvkm_wr32(device, 0x10a1c0, argp); nvkm_wr32(device, 0x10a1c0, nvkm_rd32(device, 0x10a1c4) + argi); return nvkm_rd32(device, 0x10a1c4); } static void pmu_exec(struct nv50_devinit *init, u32 init_addr) { nv_wr32(init, 0x10a104, init_addr); nv_wr32(init, 0x10a10c, 0x00000000); nv_wr32(init, 0x10a100, 0x00000002); struct nvkm_device *device = init->base.subdev.device; nvkm_wr32(device, 0x10a104, init_addr); nvkm_wr32(device, 0x10a10c, 0x00000000); nvkm_wr32(device, 0x10a100, 0x00000002); } static int Loading Loading @@ -105,7 +109,8 @@ static int gm204_devinit_post(struct nvkm_subdev *subdev, bool post) { struct nv50_devinit *init = (void *)nvkm_devinit(subdev); struct nvkm_bios *bios = nvkm_bios(init); struct nvkm_device *device = init->base.subdev.device; struct nvkm_bios *bios = device->bios; struct bit_entry bit_I; u32 exec, args; int ret; Loading @@ -118,10 +123,10 @@ gm204_devinit_post(struct nvkm_subdev *subdev, bool post) /* reset PMU and load init table parser ucode */ if (post) { nv_mask(init, 0x000200, 0x00002000, 0x00000000); nv_mask(init, 0x000200, 0x00002000, 0x00002000); nv_rd32(init, 0x000200); while (nv_rd32(init, 0x10a10c) & 0x00000006) { nvkm_mask(device, 0x000200, 0x00002000, 0x00000000); nvkm_mask(device, 0x000200, 0x00002000, 0x00002000); nvkm_rd32(device, 0x000200); while (nvkm_rd32(device, 0x10a10c) & 0x00000006) { } } Loading @@ -147,9 +152,9 @@ gm204_devinit_post(struct nvkm_subdev *subdev, bool post) /* execute init tables */ if (post) { nv_wr32(init, 0x10a040, 0x00005000); nvkm_wr32(device, 0x10a040, 0x00005000); pmu_exec(init, exec); while (!(nv_rd32(init, 0x10a040) & 0x00002000)) { while (!(nvkm_rd32(device, 0x10a040) & 0x00002000)) { } } Loading