Commit 87158e5e authored by Marek Vasut's avatar Marek Vasut Committed by Shawn Guo
Browse files

ARM: dts: imx7: Move PCIe out of AIPS3 



The AIPS3 on iMX7 is at 0x30800000 and is 0x400000 long, the PCIe IP
is not part of this AIPS range. Move it to /soc node.

Signed-off-by: default avatarMarek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Richard Zhu <hongxing.zhu@nxp.com>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: linux-imx@nxp.com
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 0c6f7117

arch/arm/boot/dts/imx7d.dtsi

+43 −43
Original line number Diff line number Diff line
@@ -113,6 +113,49 @@ intc: interrupt-controller@31001000 { 
			      <0x31004000 0x2000>,

			      <0x31006000 0x2000>;

		};



		pcie: pcie@33800000 {

			compatible = "fsl,imx7d-pcie";

			reg = <0x33800000 0x4000>,

			      <0x4ff00000 0x80000>;

			reg-names = "dbi", "config";

			#address-cells = <3>;

			#size-cells = <2>;

			device_type = "pci";

			bus-range = <0x00 0xff>;

			ranges = <0x81000000 0 0          0x4ff80000 0 0x00010000>, /* downstream I/O */

				 <0x82000000 0 0x40000000 0x40000000 0 0x0ff00000>; /* non-prefetchable memory */

			num-lanes = <1>;

			interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;

			interrupt-names = "msi";

			#interrupt-cells = <1>;

			interrupt-map-mask = <0 0 0 0x7>;

			/*

			 * Reference manual lists pci irqs incorrectly

			 * Real hardware ordering is same as imx6: D+MSI, C, B, A

			 */

			interrupt-map = <0 0 0 1 &intc GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,

					<0 0 0 2 &intc GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,

					<0 0 0 3 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,

					<0 0 0 4 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&clks IMX7D_PCIE_CTRL_ROOT_CLK>,

				 <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>,

				 <&clks IMX7D_PCIE_PHY_ROOT_CLK>;

			clock-names = "pcie", "pcie_bus", "pcie_phy";

			assigned-clocks = <&clks IMX7D_PCIE_CTRL_ROOT_SRC>,

					  <&clks IMX7D_PCIE_PHY_ROOT_SRC>;

			assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_250M_CLK>,

						 <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;



			fsl,max-link-speed = <2>;

			power-domains = <&pgc_pcie_phy>;

			resets = <&src IMX7_RESET_PCIEPHY>,

				 <&src IMX7_RESET_PCIE_CTRL_APPS_EN>,

				 <&src IMX7_RESET_PCIE_CTRL_APPS_TURNOFF>;

			reset-names = "pciephy", "apps", "turnoff";

			fsl,imx7d-pcie-phy = <&pcie_phy>;

			status = "disabled";

		};

	};

};
@@ -162,49 +205,6 @@ fec2: ethernet@30bf0000 { 
		fsl,stop-mode = <&gpr 0x10 4>;

		status = "disabled";

	};



	pcie: pcie@33800000 {

		compatible = "fsl,imx7d-pcie";

		reg = <0x33800000 0x4000>,

		      <0x4ff00000 0x80000>;

		reg-names = "dbi", "config";

		#address-cells = <3>;

		#size-cells = <2>;

		device_type = "pci";

		bus-range = <0x00 0xff>;

		ranges = <0x81000000 0 0          0x4ff80000 0 0x00010000>, /* downstream I/O */

			 <0x82000000 0 0x40000000 0x40000000 0 0x0ff00000>; /* non-prefetchable memory */

		num-lanes = <1>;

		interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;

		interrupt-names = "msi";

		#interrupt-cells = <1>;

		interrupt-map-mask = <0 0 0 0x7>;

		/*

		 * Reference manual lists pci irqs incorrectly

		 * Real hardware ordering is same as imx6: D+MSI, C, B, A

		 */

		interrupt-map = <0 0 0 1 &intc GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 0 2 &intc GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 0 3 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,

				<0 0 0 4 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&clks IMX7D_PCIE_CTRL_ROOT_CLK>,

			 <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>,

			 <&clks IMX7D_PCIE_PHY_ROOT_CLK>;

		clock-names = "pcie", "pcie_bus", "pcie_phy";

		assigned-clocks = <&clks IMX7D_PCIE_CTRL_ROOT_SRC>,

				  <&clks IMX7D_PCIE_PHY_ROOT_SRC>;

		assigned-clock-parents = <&clks IMX7D_PLL_ENET_MAIN_250M_CLK>,

					 <&clks IMX7D_PLL_ENET_MAIN_100M_CLK>;



		fsl,max-link-speed = <2>;

		power-domains = <&pgc_pcie_phy>;

		resets = <&src IMX7_RESET_PCIEPHY>,

			 <&src IMX7_RESET_PCIE_CTRL_APPS_EN>,

			 <&src IMX7_RESET_PCIE_CTRL_APPS_TURNOFF>;

		reset-names = "pciephy", "apps", "turnoff";

		fsl,imx7d-pcie-phy = <&pcie_phy>;

		status = "disabled";

	};

};



&ca_funnel_in_ports {