Commit 8612a435 authored by Srinivasan Shanmugam's avatar Srinivasan Shanmugam Committed by Alex Deucher
Browse files

drm/amdgpu: Fix warnings in gmc_v10_0.c 



Fix below checkpatch warnings:

WARNING: Consider removing the code enclosed by this #if 0 and its #endif
WARNING: Prefer 'unsigned int' to bare use of 'unsigned'
WARNING: quoted string split across lines

Cc: Christian König <christian.koenig@amd.com>
Cc: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarSrinivasan Shanmugam <srinivasan.shanmugam@amd.com>
Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e2710187

drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c

+13 −22
Original line number Diff line number Diff line
@@ -53,16 +53,9 @@ 


#include "amdgpu_reset.h"



#if 0

static const struct soc15_reg_golden golden_settings_navi10_hdp[] =

{

	/* TODO add golden setting for hdp */

};

#endif



static int gmc_v10_0_ecc_interrupt_state(struct amdgpu_device *adev,

					 struct amdgpu_irq_src *src,

					 unsigned type,

					 unsigned int type,

					 enum amdgpu_interrupt_state state)

{

	return 0;
@@ -70,7 +63,7 @@ static int gmc_v10_0_ecc_interrupt_state(struct amdgpu_device *adev, 


static int

gmc_v10_0_vm_fault_interrupt_state(struct amdgpu_device *adev,

				   struct amdgpu_irq_src *src, unsigned type,

				   struct amdgpu_irq_src *src, unsigned int type,

				   enum amdgpu_interrupt_state state)

{

	switch (state) {
@@ -164,8 +157,7 @@ static int gmc_v10_0_process_interrupt(struct amdgpu_device *adev, 
	amdgpu_vm_get_task_info(adev, entry->pasid, &task_info);



	dev_err(adev->dev,

		"[%s] page fault (src_id:%u ring:%u vmid:%u pasid:%u, "

		"for process %s pid %d thread %s pid %d)\n",

		"[%s] page fault (src_id:%u ring:%u vmid:%u pasid:%u, for process %s pid %d thread %s pid %d)\n",

		entry->vmid_src ? "mmhub" : "gfxhub",

		entry->src_id, entry->ring_id, entry->vmid,

		entry->pasid, task_info.process_name, task_info.tgid,
@@ -244,7 +236,7 @@ static void gmc_v10_0_flush_vm_hub(struct amdgpu_device *adev, uint32_t vmid, 
	u32 inv_req = hub->vmhub_funcs->get_invalidate_req(vmid, flush_type);

	u32 tmp;

	/* Use register 17 for GART */

	const unsigned eng = 17;

	const unsigned int eng = 17;

	unsigned int i;

	unsigned char hub_ip = 0;
@@ -346,7 +338,7 @@ static void gmc_v10_0_flush_gpu_tlb(struct amdgpu_device *adev, uint32_t vmid, 
	    (amdgpu_sriov_runtime(adev) || !amdgpu_sriov_vf(adev)) &&

	    down_read_trylock(&adev->reset_domain->sem)) {

		struct amdgpu_vmhub *hub = &adev->vmhub[vmhub];

		const unsigned eng = 17;

		const unsigned int eng = 17;

		u32 inv_req = hub->vmhub_funcs->get_invalidate_req(vmid, flush_type);

		u32 req = hub->vm_inv_eng0_req + hub->eng_distance * eng;

		u32 ack = hub->vm_inv_eng0_ack + hub->eng_distance * eng;
@@ -477,12 +469,12 @@ static int gmc_v10_0_flush_gpu_tlb_pasid(struct amdgpu_device *adev, 
}



static uint64_t gmc_v10_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring,

					     unsigned vmid, uint64_t pd_addr)

					     unsigned int vmid, uint64_t pd_addr)

{

	bool use_semaphore = gmc_v10_0_use_invalidate_semaphore(ring->adev, ring->vm_hub);

	struct amdgpu_vmhub *hub = &ring->adev->vmhub[ring->vm_hub];

	uint32_t req = hub->vmhub_funcs->get_invalidate_req(vmid, 0);

	unsigned eng = ring->vm_inv_eng;

	unsigned int eng = ring->vm_inv_eng;



	/*

	 * It may lose gpuvm invalidate acknowldege state across power-gating
@@ -524,8 +516,8 @@ static uint64_t gmc_v10_0_emit_flush_gpu_tlb(struct amdgpu_ring *ring, 
	return pd_addr;

}



static void gmc_v10_0_emit_pasid_mapping(struct amdgpu_ring *ring, unsigned vmid,

					 unsigned pasid)

static void gmc_v10_0_emit_pasid_mapping(struct amdgpu_ring *ring, unsigned int vmid,

					 unsigned int pasid)

{

	struct amdgpu_device *adev = ring->adev;

	uint32_t reg;
@@ -645,10 +637,10 @@ static void gmc_v10_0_get_vm_pte(struct amdgpu_device *adev, 
			 AMDGPU_PTE_MTYPE_NV10(MTYPE_UC);

}



static unsigned gmc_v10_0_get_vbios_fb_size(struct amdgpu_device *adev)

static unsigned int gmc_v10_0_get_vbios_fb_size(struct amdgpu_device *adev)

{

	u32 d1vga_control = RREG32_SOC15(DCE, 0, mmD1VGA_CONTROL);

	unsigned size;

	unsigned int size;



	if (REG_GET_FIELD(d1vga_control, D1VGA_CONTROL, D1VGA_MODE_ENABLE)) {

		size = AMDGPU_VBIOS_VGA_ALLOCATION;
@@ -1082,7 +1074,7 @@ static int gmc_v10_0_gart_enable(struct amdgpu_device *adev) 
		gmc_v10_0_flush_gpu_tlb(adev, 0, AMDGPU_GFXHUB(0), 0);



	DRM_INFO("PCIE GART of %uM enabled (table at 0x%016llX).\n",

		 (unsigned)(adev->gmc.gart_size >> 20),

		 (unsigned int)(adev->gmc.gart_size >> 20),

		 (unsigned long long)amdgpu_bo_gpu_offset(adev->gart.bo));



	return 0;
@@ -1256,8 +1248,7 @@ const struct amd_ip_funcs gmc_v10_0_ip_funcs = { 
	.get_clockgating_state = gmc_v10_0_get_clockgating_state,

};



const struct amdgpu_ip_block_version gmc_v10_0_ip_block =

{

const struct amdgpu_ip_block_version gmc_v10_0_ip_block = {

	.type = AMD_IP_BLOCK_TYPE_GMC,

	.major = 10,

	.minor = 0,