Commit 810e4441 authored by Jamin Lin's avatar Jamin Lin Committed by Rob Herring
Browse files

dt-bindings: aspeed-i2c: Convert txt to yaml format 



Convert aspeed i2c to yaml.

Signed-off-by: default avatarJamin Lin <jamin_lin@aspeedtech.com>
Link: https://lore.kernel.org/r/20210603024839.27976-2-jamin_lin@aspeedtech.com


Signed-off-by: default avatarRob Herring <robh@kernel.org>
parent 000fe967

Documentation/devicetree/bindings/i2c/aspeed,i2c.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)

%YAML 1.2

---

$id: http://devicetree.org/schemas/i2c/aspeed,i2c.yaml#

$schema: http://devicetree.org/meta-schemas/core.yaml#



title: ASPEED I2C on the AST24XX, AST25XX, and AST26XX SoCs Device Tree Bindings



maintainers:

  - Rayn Chen <rayn_chen@aspeedtech.com>



allOf:

  - $ref: /schemas/i2c/i2c-controller.yaml#



properties:

  compatible:

    enum:

      - aspeed,ast2400-i2c-bus

      - aspeed,ast2500-i2c-bus

      - aspeed,ast2600-i2c-bus



  reg:

    minItems: 1

    maxItems: 2

    items:

      - description: address offset and range of bus

      - description: address offset and range of bus buffer



  interrupts:

    maxItems: 1



  clocks:

    maxItems: 1

    description:

      root clock of bus, should reference the APB

      clock in the second cell



  resets:

    maxItems: 1



  bus-frequency:

    minimum: 500

    maximum: 4000000

    default: 100000

    description: frequency of the bus clock in Hz defaults to 100 kHz when not

      specified



  multi-master:

    type: boolean

    description:

      states that there is another master active on this bus



required:

  - reg

  - compatible

  - clocks

  - resets



unevaluatedProperties: false



examples:

  - |

    #include <dt-bindings/clock/aspeed-clock.h>

    i2c0: i2c-bus@40 {

      #address-cells = <1>;

      #size-cells = <0>;

      #interrupt-cells = <1>;

      compatible = "aspeed,ast2500-i2c-bus";

      reg = <0x40 0x40>;

      clocks = <&syscon ASPEED_CLK_APB>;

      resets = <&syscon ASPEED_RESET_I2C>;

      bus-frequency = <100000>;

      interrupts = <0>;

      interrupt-parent = <&i2c_ic>;

    };

Documentation/devicetree/bindings/i2c/i2c-aspeed.txt

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Device tree configuration for the I2C busses on the AST24XX, AST25XX, and AST26XX SoCs.



Required Properties:

- #address-cells	: should be 1

- #size-cells		: should be 0

- reg			: address offset and range of bus

- compatible		: should be "aspeed,ast2400-i2c-bus"

			  or "aspeed,ast2500-i2c-bus"

			  or "aspeed,ast2600-i2c-bus"

- clocks		: root clock of bus, should reference the APB

			  clock in the second cell

- resets		: phandle to reset controller with the reset number in

			  the second cell

- interrupts		: interrupt number



Optional Properties:

- bus-frequency	: frequency of the bus clock in Hz defaults to 100 kHz when not

		  specified

- multi-master	: states that there is another master active on this bus.



Example:



i2c {

	compatible = "simple-bus";

	#address-cells = <1>;

	#size-cells = <1>;

	ranges = <0 0x1e78a000 0x1000>;



	i2c_ic: interrupt-controller@0 {

		#interrupt-cells = <1>;

		compatible = "aspeed,ast2400-i2c-ic";

		reg = <0x0 0x40>;

		interrupts = <12>;

		interrupt-controller;

	};



	i2c0: i2c-bus@40 {

		#address-cells = <1>;

		#size-cells = <0>;

		#interrupt-cells = <1>;

		reg = <0x40 0x40>;

		compatible = "aspeed,ast2400-i2c-bus";

		clocks = <&syscon ASPEED_CLK_APB>;

		resets = <&syscon ASPEED_RESET_I2C>;

		bus-frequency = <100000>;

		interrupts = <0>;

		interrupt-parent = <&i2c_ic>;

	};

};