Loading drivers/gpu/drm/nouveau/include/nvkm/core/object.h +0 −14 Original line number Diff line number Diff line Loading @@ -178,18 +178,4 @@ nv_mo32(void *obj, u64 addr, u32 mask, u32 data) nv_wo32(obj, addr, (temp & ~mask) | data); return temp; } static inline int nv_memcmp(void *obj, u32 addr, const char *str, u32 len) { unsigned char c1, c2; while (len--) { c1 = nv_ro08(obj, addr++); c2 = *(str++); if (c1 != c2) return c1 - c2; } return 0; } #endif drivers/gpu/drm/nouveau/include/nvkm/subdev/bios.h +5 −0 Original line number Diff line number Diff line Loading @@ -27,6 +27,11 @@ nvkm_bios(void *obj) u8 nvbios_checksum(const u8 *data, int size); u16 nvbios_findstr(const u8 *data, int size, const char *str, int len); int nvbios_memcmp(struct nvkm_bios *, u32 addr, const char *, u32 len); #define nvbios_rd08(b,o) (b)->data[(o)] #define nvbios_rd16(b,o) get_unaligned_le16(&(b)->data[(o)]) #define nvbios_rd32(b,o) get_unaligned_le32(&(b)->data[(o)]) extern struct nvkm_oclass nvkm_bios_oclass; #endif drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/bmp.h +5 −5 Original line number Diff line number Diff line Loading @@ -4,8 +4,8 @@ static inline u16 bmp_version(struct nvkm_bios *bios) { if (bios->bmp_offset) { return nv_ro08(bios, bios->bmp_offset + 5) << 8 | nv_ro08(bios, bios->bmp_offset + 6); return nvbios_rd08(bios, bios->bmp_offset + 5) << 8 | nvbios_rd08(bios, bios->bmp_offset + 6); } return 0x0000; Loading @@ -15,7 +15,7 @@ static inline u16 bmp_mem_init_table(struct nvkm_bios *bios) { if (bmp_version(bios) >= 0x0300) return nv_ro16(bios, bios->bmp_offset + 24); return nvbios_rd16(bios, bios->bmp_offset + 24); return 0x0000; } Loading @@ -23,7 +23,7 @@ static inline u16 bmp_sdr_seq_table(struct nvkm_bios *bios) { if (bmp_version(bios) >= 0x0300) return nv_ro16(bios, bios->bmp_offset + 26); return nvbios_rd16(bios, bios->bmp_offset + 26); return 0x0000; } Loading @@ -31,7 +31,7 @@ static inline u16 bmp_ddr_seq_table(struct nvkm_bios *bios) { if (bmp_version(bios) >= 0x0300) return nv_ro16(bios, bios->bmp_offset + 28); return nvbios_rd16(bios, bios->bmp_offset + 28); return 0x0000; } #endif drivers/gpu/drm/nouveau/nvkm/engine/disp/dport.c +4 −4 Original line number Diff line number Diff line Loading @@ -69,13 +69,13 @@ dp_set_link_config(struct dp_state *dp) /* set desired link configuration on the source */ if ((lnkcmp = dp->outp->info.lnkcmp)) { if (outp->version < 0x30) { while ((dp->link_bw / 10) < nv_ro16(bios, lnkcmp)) while ((dp->link_bw / 10) < nvbios_rd16(bios, lnkcmp)) lnkcmp += 4; init.offset = nv_ro16(bios, lnkcmp + 2); init.offset = nvbios_rd16(bios, lnkcmp + 2); } else { while ((dp->link_bw / 27000) < nv_ro08(bios, lnkcmp)) while ((dp->link_bw / 27000) < nvbios_rd08(bios, lnkcmp)) lnkcmp += 3; init.offset = nv_ro16(bios, lnkcmp + 1); init.offset = nvbios_rd16(bios, lnkcmp + 1); } nvbios_exec(&init); Loading drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0203.c +10 −10 Original line number Diff line number Diff line Loading @@ -33,14 +33,14 @@ nvbios_M0203Te(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len) if (!bit_entry(bios, 'M', &bit_M)) { if (bit_M.version == 2 && bit_M.length > 0x04) data = nv_ro16(bios, bit_M.offset + 0x03); data = nvbios_rd16(bios, bit_M.offset + 0x03); if (data) { *ver = nv_ro08(bios, data + 0x00); *ver = nvbios_rd08(bios, data + 0x00); switch (*ver) { case 0x10: *hdr = nv_ro08(bios, data + 0x01); *len = nv_ro08(bios, data + 0x02); *cnt = nv_ro08(bios, data + 0x03); *hdr = nvbios_rd08(bios, data + 0x01); *len = nvbios_rd08(bios, data + 0x02); *cnt = nvbios_rd08(bios, data + 0x03); return data; default: break; Loading @@ -59,8 +59,8 @@ nvbios_M0203Tp(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len, memset(info, 0x00, sizeof(*info)); switch (!!data * *ver) { case 0x10: info->type = nv_ro08(bios, data + 0x04); info->pointer = nv_ro16(bios, data + 0x05); info->type = nvbios_rd08(bios, data + 0x04); info->pointer = nvbios_rd16(bios, data + 0x05); break; default: break; Loading Loading @@ -89,9 +89,9 @@ nvbios_M0203Ep(struct nvkm_bios *bios, int idx, u8 *ver, u8 *hdr, memset(info, 0x00, sizeof(*info)); switch (!!data * *ver) { case 0x10: info->type = (nv_ro08(bios, data + 0x00) & 0x0f) >> 0; info->strap = (nv_ro08(bios, data + 0x00) & 0xf0) >> 4; info->group = (nv_ro08(bios, data + 0x01) & 0x0f) >> 0; info->type = (nvbios_rd08(bios, data + 0x00) & 0x0f) >> 0; info->strap = (nvbios_rd08(bios, data + 0x00) & 0xf0) >> 4; info->group = (nvbios_rd08(bios, data + 0x01) & 0x0f) >> 0; return data; default: break; Loading Loading
drivers/gpu/drm/nouveau/include/nvkm/core/object.h +0 −14 Original line number Diff line number Diff line Loading @@ -178,18 +178,4 @@ nv_mo32(void *obj, u64 addr, u32 mask, u32 data) nv_wo32(obj, addr, (temp & ~mask) | data); return temp; } static inline int nv_memcmp(void *obj, u32 addr, const char *str, u32 len) { unsigned char c1, c2; while (len--) { c1 = nv_ro08(obj, addr++); c2 = *(str++); if (c1 != c2) return c1 - c2; } return 0; } #endif
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios.h +5 −0 Original line number Diff line number Diff line Loading @@ -27,6 +27,11 @@ nvkm_bios(void *obj) u8 nvbios_checksum(const u8 *data, int size); u16 nvbios_findstr(const u8 *data, int size, const char *str, int len); int nvbios_memcmp(struct nvkm_bios *, u32 addr, const char *, u32 len); #define nvbios_rd08(b,o) (b)->data[(o)] #define nvbios_rd16(b,o) get_unaligned_le16(&(b)->data[(o)]) #define nvbios_rd32(b,o) get_unaligned_le32(&(b)->data[(o)]) extern struct nvkm_oclass nvkm_bios_oclass; #endif
drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/bmp.h +5 −5 Original line number Diff line number Diff line Loading @@ -4,8 +4,8 @@ static inline u16 bmp_version(struct nvkm_bios *bios) { if (bios->bmp_offset) { return nv_ro08(bios, bios->bmp_offset + 5) << 8 | nv_ro08(bios, bios->bmp_offset + 6); return nvbios_rd08(bios, bios->bmp_offset + 5) << 8 | nvbios_rd08(bios, bios->bmp_offset + 6); } return 0x0000; Loading @@ -15,7 +15,7 @@ static inline u16 bmp_mem_init_table(struct nvkm_bios *bios) { if (bmp_version(bios) >= 0x0300) return nv_ro16(bios, bios->bmp_offset + 24); return nvbios_rd16(bios, bios->bmp_offset + 24); return 0x0000; } Loading @@ -23,7 +23,7 @@ static inline u16 bmp_sdr_seq_table(struct nvkm_bios *bios) { if (bmp_version(bios) >= 0x0300) return nv_ro16(bios, bios->bmp_offset + 26); return nvbios_rd16(bios, bios->bmp_offset + 26); return 0x0000; } Loading @@ -31,7 +31,7 @@ static inline u16 bmp_ddr_seq_table(struct nvkm_bios *bios) { if (bmp_version(bios) >= 0x0300) return nv_ro16(bios, bios->bmp_offset + 28); return nvbios_rd16(bios, bios->bmp_offset + 28); return 0x0000; } #endif
drivers/gpu/drm/nouveau/nvkm/engine/disp/dport.c +4 −4 Original line number Diff line number Diff line Loading @@ -69,13 +69,13 @@ dp_set_link_config(struct dp_state *dp) /* set desired link configuration on the source */ if ((lnkcmp = dp->outp->info.lnkcmp)) { if (outp->version < 0x30) { while ((dp->link_bw / 10) < nv_ro16(bios, lnkcmp)) while ((dp->link_bw / 10) < nvbios_rd16(bios, lnkcmp)) lnkcmp += 4; init.offset = nv_ro16(bios, lnkcmp + 2); init.offset = nvbios_rd16(bios, lnkcmp + 2); } else { while ((dp->link_bw / 27000) < nv_ro08(bios, lnkcmp)) while ((dp->link_bw / 27000) < nvbios_rd08(bios, lnkcmp)) lnkcmp += 3; init.offset = nv_ro16(bios, lnkcmp + 1); init.offset = nvbios_rd16(bios, lnkcmp + 1); } nvbios_exec(&init); Loading
drivers/gpu/drm/nouveau/nvkm/subdev/bios/M0203.c +10 −10 Original line number Diff line number Diff line Loading @@ -33,14 +33,14 @@ nvbios_M0203Te(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len) if (!bit_entry(bios, 'M', &bit_M)) { if (bit_M.version == 2 && bit_M.length > 0x04) data = nv_ro16(bios, bit_M.offset + 0x03); data = nvbios_rd16(bios, bit_M.offset + 0x03); if (data) { *ver = nv_ro08(bios, data + 0x00); *ver = nvbios_rd08(bios, data + 0x00); switch (*ver) { case 0x10: *hdr = nv_ro08(bios, data + 0x01); *len = nv_ro08(bios, data + 0x02); *cnt = nv_ro08(bios, data + 0x03); *hdr = nvbios_rd08(bios, data + 0x01); *len = nvbios_rd08(bios, data + 0x02); *cnt = nvbios_rd08(bios, data + 0x03); return data; default: break; Loading @@ -59,8 +59,8 @@ nvbios_M0203Tp(struct nvkm_bios *bios, u8 *ver, u8 *hdr, u8 *cnt, u8 *len, memset(info, 0x00, sizeof(*info)); switch (!!data * *ver) { case 0x10: info->type = nv_ro08(bios, data + 0x04); info->pointer = nv_ro16(bios, data + 0x05); info->type = nvbios_rd08(bios, data + 0x04); info->pointer = nvbios_rd16(bios, data + 0x05); break; default: break; Loading Loading @@ -89,9 +89,9 @@ nvbios_M0203Ep(struct nvkm_bios *bios, int idx, u8 *ver, u8 *hdr, memset(info, 0x00, sizeof(*info)); switch (!!data * *ver) { case 0x10: info->type = (nv_ro08(bios, data + 0x00) & 0x0f) >> 0; info->strap = (nv_ro08(bios, data + 0x00) & 0xf0) >> 4; info->group = (nv_ro08(bios, data + 0x01) & 0x0f) >> 0; info->type = (nvbios_rd08(bios, data + 0x00) & 0x0f) >> 0; info->strap = (nvbios_rd08(bios, data + 0x00) & 0xf0) >> 4; info->group = (nvbios_rd08(bios, data + 0x01) & 0x0f) >> 0; return data; default: break; Loading