Commit 7b07ed50 authored by Giovanni Cabiddu's avatar Giovanni Cabiddu Committed by Herbert Xu
Browse files

crypto: qat - mask device capabilities with soft straps 



Enable acceleration engines (AEs) and accelerators based on soft straps
and fuses. When looping with a number of AEs or accelerators, ignore the
ones that are disabled.

This patch is based on earlier work done by Conor McLoughlin.

Signed-off-by: default avatarGiovanni Cabiddu <giovanni.cabiddu@intel.com>
Reviewed-by: default avatarFiona Trahe <fiona.trahe@intel.com>
Reviewed-by: default avatarWojciech Ziemba <wojciech.ziemba@intel.com>
Reviewed-by: default avatarAndy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: default avatarHerbert Xu <herbert@gondor.apana.org.au>
parent e4e37acc

drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.c

+27 −7
Original line number Diff line number Diff line
@@ -17,15 +17,33 @@ static struct adf_hw_device_class c3xxx_class = { 
	.instances = 0

};



static u32 get_accel_mask(u32 fuse)

static u32 get_accel_mask(struct adf_hw_device_data *self)

{

	return (~fuse) >> ADF_C3XXX_ACCELERATORS_REG_OFFSET &

		ADF_C3XXX_ACCELERATORS_MASK;

	u32 straps = self->straps;

	u32 fuses = self->fuses;

	u32 accel;



	accel = ~(fuses | straps) >> ADF_C3XXX_ACCELERATORS_REG_OFFSET;

	accel &= ADF_C3XXX_ACCELERATORS_MASK;



	return accel;

}



static u32 get_ae_mask(u32 fuse)

static u32 get_ae_mask(struct adf_hw_device_data *self)

{

	return (~fuse) & ADF_C3XXX_ACCELENGINES_MASK;

	u32 straps = self->straps;

	u32 fuses = self->fuses;

	unsigned long disabled;

	u32 ae_disable;

	int accel;



	/* If an accel is disabled, then disable the corresponding two AEs */

	disabled = ~get_accel_mask(self) & ADF_C3XXX_ACCELERATORS_MASK;

	ae_disable = BIT(1) | BIT(0);

	for_each_set_bit(accel, &disabled, ADF_C3XXX_MAX_ACCELERATORS)

		straps |= ae_disable << (accel << 1);



	return ~(fuses | straps) & ADF_C3XXX_ACCELENGINES_MASK;

}



static u32 get_num_accels(struct adf_hw_device_data *self)
@@ -109,11 +127,13 @@ static void adf_enable_error_correction(struct adf_accel_dev *accel_dev) 
{

	struct adf_hw_device_data *hw_device = accel_dev->hw_device;

	struct adf_bar *misc_bar = &GET_BARS(accel_dev)[ADF_C3XXX_PMISC_BAR];

	unsigned long accel_mask = hw_device->accel_mask;

	unsigned long ae_mask = hw_device->ae_mask;

	void __iomem *csr = misc_bar->virt_addr;

	unsigned int val, i;



	/* Enable Accel Engine error detection & correction */

	for (i = 0; i < hw_device->get_num_aes(hw_device); i++) {

	for_each_set_bit(i, &ae_mask, GET_MAX_ACCELENGINES(accel_dev)) {

		val = ADF_CSR_RD(csr, ADF_C3XXX_AE_CTX_ENABLES(i));

		val |= ADF_C3XXX_ENABLE_AE_ECC_ERR;

		ADF_CSR_WR(csr, ADF_C3XXX_AE_CTX_ENABLES(i), val);
@@ -123,7 +143,7 @@ static void adf_enable_error_correction(struct adf_accel_dev *accel_dev) 
	}



	/* Enable shared memory error detection & correction */

	for (i = 0; i < hw_device->get_num_accels(hw_device); i++) {

	for_each_set_bit(i, &accel_mask, ADF_C3XXX_MAX_ACCELERATORS) {

		val = ADF_CSR_RD(csr, ADF_C3XXX_UERRSSMSH(i));

		val |= ADF_C3XXX_ERRSSMSH_EN;

		ADF_CSR_WR(csr, ADF_C3XXX_UERRSSMSH(i), val);

drivers/crypto/qat/qat_c3xxx/adf_c3xxx_hw_data.h

+1 −0
Original line number Diff line number Diff line
@@ -18,6 +18,7 @@ 
#define ADF_C3XXX_SMIAPF1_MASK_OFFSET (0x3A000 + 0x30)

#define ADF_C3XXX_SMIA0_MASK 0xFFFF

#define ADF_C3XXX_SMIA1_MASK 0x1

#define ADF_C3XXX_SOFTSTRAP_CSR_OFFSET 0x2EC

/* Error detection and correction */

#define ADF_C3XXX_AE_CTX_ENABLES(i) (i * 0x1000 + 0x20818)

#define ADF_C3XXX_AE_MISC_CONTROL(i) (i * 0x1000 + 0x20960)

drivers/crypto/qat/qat_c3xxx/adf_drv.c

+4 −2
Original line number Diff line number Diff line
@@ -126,10 +126,12 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 
	pci_read_config_byte(pdev, PCI_REVISION_ID, &accel_pci_dev->revid);

	pci_read_config_dword(pdev, ADF_DEVICE_FUSECTL_OFFSET,

			      &hw_data->fuses);

	pci_read_config_dword(pdev, ADF_C3XXX_SOFTSTRAP_CSR_OFFSET,

			      &hw_data->straps);



	/* Get Accelerators and Accelerators Engines masks */

	hw_data->accel_mask = hw_data->get_accel_mask(hw_data->fuses);

	hw_data->ae_mask = hw_data->get_ae_mask(hw_data->fuses);

	hw_data->accel_mask = hw_data->get_accel_mask(hw_data);

	hw_data->ae_mask = hw_data->get_ae_mask(hw_data);

	accel_pci_dev->sku = hw_data->get_sku(hw_data);

	/* If the device has no acceleration engines then ignore it. */

	if (!hw_data->accel_mask || !hw_data->ae_mask ||

drivers/crypto/qat/qat_c3xxxvf/adf_c3xxxvf_hw_data.c

+2 −2
Original line number Diff line number Diff line
@@ -11,12 +11,12 @@ static struct adf_hw_device_class c3xxxiov_class = { 
	.instances = 0

};



static u32 get_accel_mask(u32 fuse)

static u32 get_accel_mask(struct adf_hw_device_data *self)

{

	return ADF_C3XXXIOV_ACCELERATORS_MASK;

}



static u32 get_ae_mask(u32 fuse)

static u32 get_ae_mask(struct adf_hw_device_data *self)

{

	return ADF_C3XXXIOV_ACCELENGINES_MASK;

}

drivers/crypto/qat/qat_c3xxxvf/adf_drv.c

+2 −2
Original line number Diff line number Diff line
@@ -119,8 +119,8 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 
	adf_init_hw_data_c3xxxiov(accel_dev->hw_device);



	/* Get Accelerators and Accelerators Engines masks */

	hw_data->accel_mask = hw_data->get_accel_mask(hw_data->fuses);

	hw_data->ae_mask = hw_data->get_ae_mask(hw_data->fuses);

	hw_data->accel_mask = hw_data->get_accel_mask(hw_data);

	hw_data->ae_mask = hw_data->get_ae_mask(hw_data);

	accel_pci_dev->sku = hw_data->get_sku(hw_data);



	/* Create dev top level debugfs entry */