Commit 78a05873 authored by Mikko Perttunen's avatar Mikko Perttunen Committed by Thierry Reding
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arm64: tegra: Add NVDEC to Tegra186/194 device trees 



Add a device tree node for NVDEC on Tegra186, and
device tree nodes for NVDEC and NVDEC1 on Tegra194.

Signed-off-by: default avatarMikko Perttunen <mperttunen@nvidia.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent 212a6aee

arch/arm64/boot/dts/nvidia/tegra186.dtsi

+16 −0
Original line number Diff line number Diff line
@@ -1433,6 +1433,22 @@ dsib: dsi@15400000 { 
			power-domains = <&bpmp TEGRA186_POWER_DOMAIN_DISP>;

		};



		nvdec@15480000 {

			compatible = "nvidia,tegra186-nvdec";

			reg = <0x15480000 0x40000>;

			clocks = <&bpmp TEGRA186_CLK_NVDEC>;

			clock-names = "nvdec";

			resets = <&bpmp TEGRA186_RESET_NVDEC>;

			reset-names = "nvdec";



			power-domains = <&bpmp TEGRA186_POWER_DOMAIN_NVDEC>;

			interconnects = <&mc TEGRA186_MEMORY_CLIENT_NVDECSRD &emc>,

					<&mc TEGRA186_MEMORY_CLIENT_NVDECSRD1 &emc>,

					<&mc TEGRA186_MEMORY_CLIENT_NVDECSWR &emc>;

			interconnect-names = "dma-mem", "read-1", "write";

			iommus = <&smmu TEGRA186_SID_NVDEC>;

		};



		sor0: sor@15540000 {

			compatible = "nvidia,tegra186-sor";

			reg = <0x15540000 0x10000>;

arch/arm64/boot/dts/nvidia/tegra194.dtsi

+38 −0
Original line number Diff line number Diff line
@@ -1457,6 +1457,25 @@ host1x@13e00000 { 
			interconnect-names = "dma-mem";

			iommus = <&smmu TEGRA194_SID_HOST1X>;



			nvdec@15140000 {

				compatible = "nvidia,tegra194-nvdec";

				reg = <0x15140000 0x00040000>;

				clocks = <&bpmp TEGRA194_CLK_NVDEC1>;

				clock-names = "nvdec";

				resets = <&bpmp TEGRA194_RESET_NVDEC1>;

				reset-names = "nvdec";



				power-domains = <&bpmp TEGRA194_POWER_DOMAIN_NVDECB>;

				interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDEC1SRD &emc>,

						<&mc TEGRA194_MEMORY_CLIENT_NVDEC1SRD1 &emc>,

						<&mc TEGRA194_MEMORY_CLIENT_NVDEC1SWR &emc>;

				interconnect-names = "dma-mem", "read-1", "write";

				iommus = <&smmu TEGRA194_SID_NVDEC1>;

				dma-coherent;



				nvidia,host1x-class = <0xf5>;

			};



			display-hub@15200000 {

				compatible = "nvidia,tegra194-display";

				reg = <0x15200000 0x00040000>;
@@ -1570,6 +1589,25 @@ vic@15340000 { 
				iommus = <&smmu TEGRA194_SID_VIC>;

			};



			nvdec@15480000 {

				compatible = "nvidia,tegra194-nvdec";

				reg = <0x15480000 0x00040000>;

				clocks = <&bpmp TEGRA194_CLK_NVDEC>;

				clock-names = "nvdec";

				resets = <&bpmp TEGRA194_RESET_NVDEC>;

				reset-names = "nvdec";



				power-domains = <&bpmp TEGRA194_POWER_DOMAIN_NVDECA>;

				interconnects = <&mc TEGRA194_MEMORY_CLIENT_NVDECSRD &emc>,

						<&mc TEGRA194_MEMORY_CLIENT_NVDECSRD1 &emc>,

						<&mc TEGRA194_MEMORY_CLIENT_NVDECSWR &emc>;

				interconnect-names = "dma-mem", "read-1", "write";

				iommus = <&smmu TEGRA194_SID_NVDEC>;

				dma-coherent;



				nvidia,host1x-class = <0xf0>;

			};



			dpaux0: dpaux@155c0000 {

				compatible = "nvidia,tegra194-dpaux";

				reg = <0x155c0000 0x10000>;