Commit 77eabc6f authored Mar 29, 2021 by Peng Ju Zhou Committed by Alex Deucher Apr 09, 2021

drm/amdgpu: indirect register access for nv12 sriov



get pf2vf msg info at it's earliest time so that
guest driver can use these info to decide whether
register indirect access enabled.

Signed-off-by: Peng Ju Zhou <PengJu.Zhou@amd.com>
Reviewed-by: Emily.Deng <Emily.Deng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

parent 8b8a162d

drivers/gpu/drm/amd/amdgpu/amdgpu_device.c

+5 −0

Original line number	Diff line number	Diff line
		@@ -2080,6 +2080,11 @@ static int amdgpu_device_ip_early_init(struct amdgpu_device *adev)
		amdgpu_vf_error_put(adev, AMDGIM_ERROR_VF_ATOMBIOS_INIT_FAIL, 0, 0);
		return r;
		}

		/get pf2vf msg info at it's earliest time/
		if (amdgpu_sriov_vf(adev))
		amdgpu_virt_init_data_exchange(adev);

		}
		}

drivers/gpu/drm/amd/amdgpu/amdgpu_virt.c

+8 −0

Original line number	Diff line number	Diff line
		@@ -617,6 +617,14 @@ void amdgpu_virt_init_data_exchange(struct amdgpu_device *adev)
		if (adev->virt.ras_init_done)
		amdgpu_virt_add_bad_page(adev, bp_block_offset, bp_block_size);
		}
		} else if (adev->bios != NULL) {
		adev->virt.fw_reserve.p_pf2vf =
		(struct amd_sriov_msg_pf2vf_info_header *)
		(adev->bios + (AMD_SRIOV_MSG_PF2VF_OFFSET_KB << 10));

		amdgpu_virt_read_pf2vf_data(adev);

		return;
		}

		if (adev->virt.vf2pf_update_interval_ms != 0) {