Commit 776461b1 authored by Rafał Miłecki's avatar Rafał Miłecki Committed by Florian Fainelli
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ARM: dts: BCM5301X: Move CRU devices to the CRU node



Clocks and thermal blocks are part of the CRU ("Clock and Reset Unit" or
"Central Resource Unit").

Signed-off-by: default avatarRafał Miłecki <rafal@milecki.pl>
Signed-off-by: default avatarFlorian Fainelli <f.fainelli@gmail.com>
parent c8620598
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+26 −25
Original line number Diff line number Diff line
@@ -428,6 +428,26 @@ cru@100 {
			#address-cells = <1>;
			#size-cells = <1>;

			lcpll0: lcpll0@100 {
				#clock-cells = <1>;
				compatible = "brcm,nsp-lcpll0";
				reg = <0x100 0x14>;
				clocks = <&osc>;
				clock-output-names = "lcpll0", "pcie_phy",
						     "sdio", "ddr_phy";
			};

			genpll: genpll@140 {
				#clock-cells = <1>;
				compatible = "brcm,nsp-genpll";
				reg = <0x140 0x24>;
				clocks = <&osc>;
				clock-output-names = "genpll", "phy",
						     "ethernetclk",
						     "usbclk", "iprocfast",
						     "sata1", "sata2";
			};

			pinctrl: pin-controller@1c0 {
				compatible = "brcm,bcm4708-pinmux";
				reg = <0x1c0 0x24>;
@@ -454,33 +474,14 @@ pinmux_uart1: uart1 {
					function = "uart1";
				};
			};
		};
	};

	lcpll0: lcpll0@1800c100 {
		#clock-cells = <1>;
		compatible = "brcm,nsp-lcpll0";
		reg = <0x1800c100 0x14>;
		clocks = <&osc>;
		clock-output-names = "lcpll0", "pcie_phy", "sdio",
				     "ddr_phy";
	};

	genpll: genpll@1800c140 {
		#clock-cells = <1>;
		compatible = "brcm,nsp-genpll";
		reg = <0x1800c140 0x24>;
		clocks = <&osc>;
		clock-output-names = "genpll", "phy", "ethernetclk",
				     "usbclk", "iprocfast", "sata1",
				     "sata2";
	};

	thermal: thermal@1800c2c0 {
			thermal: thermal@2c0 {
				compatible = "brcm,ns-thermal";
		reg = <0x1800c2c0 0x10>;
				reg = <0x2c0 0x10>;
				#thermal-sensor-cells = <0>;
			};
		};
	};

	srab: srab@18007000 {
		compatible = "brcm,bcm5301x-srab";