Commit 7052a801 authored by Michael Mityushkin's avatar Michael Mityushkin Committed by Alex Deucher
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drm/amd/display: Correct output color space during HW reinitialize



[Why]
Doing core_link_disable_stream or set_dpms_off when reinitializing
hardware causes issue to repro with external display connected. This is
unnecessary, blanking pixel data should be sufficient.

[How]
Call disable_pixel_data while reinitializing hardware instead of
core_link_disable_stream or set_dpms_off.

Reviewed-by: default avatarNicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: default avatarQingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: default avatarMichael Mityushkin <michael.mityushkin@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 6bfe9a23
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+4 −0
Original line number Diff line number Diff line
@@ -313,6 +313,10 @@ void dcn20_init_blank(
	}
	opp = dc->res_pool->opps[opp_id_src0];

	/* don't override the blank pattern if already enabled with the correct one. */
	if (opp->funcs->dpg_is_blanked && opp->funcs->dpg_is_blanked(opp))
		return;

	if (num_opps == 2) {
		otg_active_width = otg_active_width / 2;

+1 −0
Original line number Diff line number Diff line
@@ -58,6 +58,7 @@ static const struct hw_sequencer_funcs dcn31_funcs = {
	.enable_audio_stream = dce110_enable_audio_stream,
	.disable_audio_stream = dce110_disable_audio_stream,
	.disable_plane = dcn20_disable_plane,
	.disable_pixel_data = dcn20_disable_pixel_data,
	.pipe_control_lock = dcn20_pipe_control_lock,
	.interdependent_update_lock = dcn10_lock_all_pipes,
	.cursor_lock = dcn10_cursor_lock,
+1 −0
Original line number Diff line number Diff line
@@ -60,6 +60,7 @@ static const struct hw_sequencer_funcs dcn314_funcs = {
	.enable_audio_stream = dce110_enable_audio_stream,
	.disable_audio_stream = dce110_disable_audio_stream,
	.disable_plane = dcn20_disable_plane,
	.disable_pixel_data = dcn20_disable_pixel_data,
	.pipe_control_lock = dcn20_pipe_control_lock,
	.interdependent_update_lock = dcn10_lock_all_pipes,
	.cursor_lock = dcn10_cursor_lock,