Loading drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c +1 −18 Original line number Diff line number Diff line Loading @@ -3095,21 +3095,6 @@ static int gfx_v7_0_cp_compute_load_microcode(struct amdgpu_device *adev) return 0; } /** * gfx_v7_0_cp_compute_start - start the compute queues * * @adev: amdgpu_device pointer * * Enable the compute queues. * Returns 0 for success, error for failure. */ static int gfx_v7_0_cp_compute_start(struct amdgpu_device *adev) { gfx_v7_0_cp_compute_enable(adev, true); return 0; } /** * gfx_v7_0_cp_compute_fini - stop the compute queues * Loading Loading @@ -3300,9 +3285,7 @@ static int gfx_v7_0_cp_compute_resume(struct amdgpu_device *adev) u32 *buf; struct bonaire_mqd *mqd; r = gfx_v7_0_cp_compute_start(adev); if (r) return r; gfx_v7_0_cp_compute_enable(adev, true); /* fix up chicken bits */ tmp = RREG32(mmCP_CPF_DEBUG); Loading drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +1 −10 Original line number Diff line number Diff line Loading @@ -3226,13 +3226,6 @@ static void gfx_v8_0_cp_compute_enable(struct amdgpu_device *adev, bool enable) udelay(50); } static int gfx_v8_0_cp_compute_start(struct amdgpu_device *adev) { gfx_v8_0_cp_compute_enable(adev, true); return 0; } static int gfx_v8_0_cp_compute_load_microcode(struct amdgpu_device *adev) { const struct gfx_firmware_header_v1_0 *mec_hdr; Loading Loading @@ -3802,9 +3795,7 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev) WREG32(mmCP_PQ_STATUS, tmp); } r = gfx_v8_0_cp_compute_start(adev); if (r) return r; gfx_v8_0_cp_compute_enable(adev, true); for (i = 0; i < adev->gfx.num_compute_rings; i++) { struct amdgpu_ring *ring = &adev->gfx.compute_ring[i]; Loading Loading
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c +1 −18 Original line number Diff line number Diff line Loading @@ -3095,21 +3095,6 @@ static int gfx_v7_0_cp_compute_load_microcode(struct amdgpu_device *adev) return 0; } /** * gfx_v7_0_cp_compute_start - start the compute queues * * @adev: amdgpu_device pointer * * Enable the compute queues. * Returns 0 for success, error for failure. */ static int gfx_v7_0_cp_compute_start(struct amdgpu_device *adev) { gfx_v7_0_cp_compute_enable(adev, true); return 0; } /** * gfx_v7_0_cp_compute_fini - stop the compute queues * Loading Loading @@ -3300,9 +3285,7 @@ static int gfx_v7_0_cp_compute_resume(struct amdgpu_device *adev) u32 *buf; struct bonaire_mqd *mqd; r = gfx_v7_0_cp_compute_start(adev); if (r) return r; gfx_v7_0_cp_compute_enable(adev, true); /* fix up chicken bits */ tmp = RREG32(mmCP_CPF_DEBUG); Loading
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c +1 −10 Original line number Diff line number Diff line Loading @@ -3226,13 +3226,6 @@ static void gfx_v8_0_cp_compute_enable(struct amdgpu_device *adev, bool enable) udelay(50); } static int gfx_v8_0_cp_compute_start(struct amdgpu_device *adev) { gfx_v8_0_cp_compute_enable(adev, true); return 0; } static int gfx_v8_0_cp_compute_load_microcode(struct amdgpu_device *adev) { const struct gfx_firmware_header_v1_0 *mec_hdr; Loading Loading @@ -3802,9 +3795,7 @@ static int gfx_v8_0_cp_compute_resume(struct amdgpu_device *adev) WREG32(mmCP_PQ_STATUS, tmp); } r = gfx_v8_0_cp_compute_start(adev); if (r) return r; gfx_v8_0_cp_compute_enable(adev, true); for (i = 0; i < adev->gfx.num_compute_rings; i++) { struct amdgpu_ring *ring = &adev->gfx.compute_ring[i]; Loading