Commit 6e8aa4a1 authored by Mike Rapoport's avatar Mike Rapoport Committed by Greg Kroah-Hartman
Browse files

staging: sm750fb: change definition of CURRENT_GATE multi-bit fields 



Use more straight-forward definitions for multi-bit fields of
CURRENT_GATE register and use open-coded implementation for register
manipulation.

Signed-off-by: default avatarMike Rapoport <mike.rapoport@gmail.com>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 19aa2113

drivers/staging/sm750fb/ddk750_chip.c

+10 −10
Original line number Diff line number Diff line
@@ -95,20 +95,20 @@ static void setMemoryClock(unsigned int frequency) 
		divisor = roundedDiv(get_mxclk_freq(), frequency);



		/* Set the corresponding divisor in the register. */

		reg = PEEK32(CURRENT_GATE);

		reg = PEEK32(CURRENT_GATE) & ~CURRENT_GATE_M2XCLK_MASK;

		switch (divisor) {

		default:

		case 1:

			reg = FIELD_SET(reg, CURRENT_GATE, M2XCLK, DIV_1);

			reg |= CURRENT_GATE_M2XCLK_DIV_1;

			break;

		case 2:

			reg = FIELD_SET(reg, CURRENT_GATE, M2XCLK, DIV_2);

			reg |= CURRENT_GATE_M2XCLK_DIV_2;

			break;

		case 3:

			reg = FIELD_SET(reg, CURRENT_GATE, M2XCLK, DIV_3);

			reg |= CURRENT_GATE_M2XCLK_DIV_3;

			break;

		case 4:

			reg = FIELD_SET(reg, CURRENT_GATE, M2XCLK, DIV_4);

			reg |= CURRENT_GATE_M2XCLK_DIV_4;

			break;

		}
@@ -142,20 +142,20 @@ static void setMasterClock(unsigned int frequency) 
		divisor = roundedDiv(get_mxclk_freq(), frequency);



		/* Set the corresponding divisor in the register. */

		reg = PEEK32(CURRENT_GATE);

		reg = PEEK32(CURRENT_GATE) & ~CURRENT_GATE_MCLK_MASK;

		switch (divisor) {

		default:

		case 3:

			reg = FIELD_SET(reg, CURRENT_GATE, MCLK, DIV_3);

			reg |= CURRENT_GATE_MCLK_DIV_3;

			break;

		case 4:

			reg = FIELD_SET(reg, CURRENT_GATE, MCLK, DIV_4);

			reg |= CURRENT_GATE_MCLK_DIV_4;

			break;

		case 6:

			reg = FIELD_SET(reg, CURRENT_GATE, MCLK, DIV_6);

			reg |= CURRENT_GATE_MCLK_DIV_6;

			break;

		case 8:

			reg = FIELD_SET(reg, CURRENT_GATE, MCLK, DIV_8);

			reg |= CURRENT_GATE_MCLK_DIV_8;

			break;

		}

drivers/staging/sm750fb/ddk750_reg.h

+18 −18
Original line number Diff line number Diff line
@@ -391,29 +391,29 @@ 
#define INT_MASK_VGA_VSYNC_ENABLE                     1



#define CURRENT_GATE                                  0x000040

#define CURRENT_GATE_MCLK                             15:14

#define CURRENT_GATE_MCLK_MASK                        (0x3 << 14)

#ifdef VALIDATION_CHIP

    #define CURRENT_GATE_MCLK_112MHZ                      0

    #define CURRENT_GATE_MCLK_84MHZ                       1

    #define CURRENT_GATE_MCLK_56MHZ                       2

    #define CURRENT_GATE_MCLK_42MHZ                       3

    #define CURRENT_GATE_MCLK_112MHZ                  (0x0 << 14)

    #define CURRENT_GATE_MCLK_84MHZ                   (0x1 << 14)

    #define CURRENT_GATE_MCLK_56MHZ                   (0x2 << 14)

    #define CURRENT_GATE_MCLK_42MHZ                   (0x3 << 14)

#else

    #define CURRENT_GATE_MCLK_DIV_3                       0

    #define CURRENT_GATE_MCLK_DIV_4                       1

    #define CURRENT_GATE_MCLK_DIV_6                       2

    #define CURRENT_GATE_MCLK_DIV_8                       3

    #define CURRENT_GATE_MCLK_DIV_3                   (0x0 << 14)

    #define CURRENT_GATE_MCLK_DIV_4                   (0x1 << 14)

    #define CURRENT_GATE_MCLK_DIV_6                   (0x2 << 14)

    #define CURRENT_GATE_MCLK_DIV_8                   (0x3 << 14)

#endif

#define CURRENT_GATE_M2XCLK                           13:12

#define CURRENT_GATE_M2XCLK_MASK                      (0x3 << 12)

#ifdef VALIDATION_CHIP

    #define CURRENT_GATE_M2XCLK_336MHZ                    0

    #define CURRENT_GATE_M2XCLK_168MHZ                    1

    #define CURRENT_GATE_M2XCLK_112MHZ                    2

    #define CURRENT_GATE_M2XCLK_84MHZ                     3

    #define CURRENT_GATE_M2XCLK_336MHZ                (0x0 << 12)

    #define CURRENT_GATE_M2XCLK_168MHZ                (0x1 << 12)

    #define CURRENT_GATE_M2XCLK_112MHZ                (0x2 << 12)

    #define CURRENT_GATE_M2XCLK_84MHZ                 (0x3 << 12)

#else

    #define CURRENT_GATE_M2XCLK_DIV_1                     0

    #define CURRENT_GATE_M2XCLK_DIV_2                     1

    #define CURRENT_GATE_M2XCLK_DIV_3                     2

    #define CURRENT_GATE_M2XCLK_DIV_4                     3

    #define CURRENT_GATE_M2XCLK_DIV_1                 (0x0 << 12)

    #define CURRENT_GATE_M2XCLK_DIV_2                 (0x1 << 12)

    #define CURRENT_GATE_M2XCLK_DIV_3                 (0x2 << 12)

    #define CURRENT_GATE_M2XCLK_DIV_4                 (0x3 << 12)

#endif

#define CURRENT_GATE_VGA                              BIT(10)

#define CURRENT_GATE_PWM                              BIT(9)