Commit 6b7d2117 authored by Lijo Lazar's avatar Lijo Lazar Committed by Alex Deucher
Browse files

drm/amdgpu: Fix refclk reporting for SMU v13.0.6



SMU v13.0.6 SOCs have 100MHz reference clock.

Signed-off-by: default avatarLijo Lazar <lijo.lazar@amd.com>
Reviewed-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent c2c23a10
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+2 −1
Original line number Diff line number Diff line
@@ -325,7 +325,8 @@ static u32 soc15_get_xclk(struct amdgpu_device *adev)
	u32 reference_clock = adev->clock.spll.reference_freq;

	if (adev->ip_versions[MP1_HWIP][0] == IP_VERSION(12, 0, 0) ||
	    adev->ip_versions[MP1_HWIP][0] == IP_VERSION(12, 0, 1))
	    adev->ip_versions[MP1_HWIP][0] == IP_VERSION(12, 0, 1) ||
	    adev->ip_versions[MP1_HWIP][0] == IP_VERSION(13, 0, 6))
		return 10000;
	if (adev->ip_versions[MP1_HWIP][0] == IP_VERSION(10, 0, 0) ||
	    adev->ip_versions[MP1_HWIP][0] == IP_VERSION(10, 0, 1))