Commit 6a62f643 authored by Lad Prabhakar's avatar Lad Prabhakar Committed by Geert Uytterhoeven
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ARM: dts: r8a7742: Add DU support 



Add a Display Unit (DU) node to r8a7742 SoC DT.
Boards that want to enable the DU need to specify the output topology.

Signed-off-by: default avatarLad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: default avatarMarian-Cristian Rotariu <marian-cristian.rotariu.rb@bp.renesas.com>
Reviewed-by: default avatarLaurent Pinchart <laurent.pinchart@ideasonboard.com>
Link: https://lore.kernel.org/r/20200807174954.14448-6-prabhakar.mahadev-lad.rj@bp.renesas.com


Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 02b24822

arch/arm/boot/dts/r8a7742.dtsi

+35 −0
Original line number Diff line number Diff line
@@ -1509,6 +1509,41 @@ gic: interrupt-controller@f1001000 { 
			resets = <&cpg 408>;

		};



		du: display@feb00000 {

			compatible = "renesas,du-r8a7742";

			reg = <0 0xfeb00000 0 0x70000>;

			interrupts = <GIC_SPI 256 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>,

				     <GIC_SPI 269 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&cpg CPG_MOD 724>, <&cpg CPG_MOD 723>,

				 <&cpg CPG_MOD 722>;

			clock-names = "du.0", "du.1", "du.2";

			resets = <&cpg 724>;

			reset-names = "du.0";

			status = "disabled";



			ports {

				#address-cells = <1>;

				#size-cells = <0>;



				port@0 {

					reg = <0>;

					du_out_rgb: endpoint {

					};

				};

				port@1 {

					reg = <1>;

					du_out_lvds0: endpoint {

					};

				};

				port@2 {

					reg = <2>;

					du_out_lvds1: endpoint {

					};

				};

			};

		};



		prr: chipid@ff000044 {

			compatible = "renesas,prr";

			reg = <0 0xff000044 0 4>;