Loading drivers/gpu/drm/nouveau/include/nvif/class.h +1 −49 Original line number Diff line number Diff line Loading @@ -2,7 +2,7 @@ #define __NVIF_CLASS_H__ /* these class numbers are made up by us, and not nvidia-assigned */ #define NVIF_CLASS_CONTROL -1 #define NVIF_CLASS_CONTROL /* if0001.h */ -1 #define NVIF_CLASS_PERFMON -2 #define NVIF_CLASS_PERFDOM -3 #define NVIF_CLASS_SW_NV04 /* if0004.h */ -4 Loading Loading @@ -341,52 +341,4 @@ struct nvif_perfdom_read_v0 { __u32 clk; __u8 pad04[4]; }; /******************************************************************************* * device control ******************************************************************************/ #define NVIF_CONTROL_PSTATE_INFO 0x00 #define NVIF_CONTROL_PSTATE_ATTR 0x01 #define NVIF_CONTROL_PSTATE_USER 0x02 struct nvif_control_pstate_info_v0 { __u8 version; __u8 count; /* out: number of power states */ #define NVIF_CONTROL_PSTATE_INFO_V0_USTATE_DISABLE (-1) #define NVIF_CONTROL_PSTATE_INFO_V0_USTATE_PERFMON (-2) __s8 ustate_ac; /* out: target pstate index */ __s8 ustate_dc; /* out: target pstate index */ __s8 pwrsrc; /* out: current power source */ #define NVIF_CONTROL_PSTATE_INFO_V0_PSTATE_UNKNOWN (-1) #define NVIF_CONTROL_PSTATE_INFO_V0_PSTATE_PERFMON (-2) __s8 pstate; /* out: current pstate index */ __u8 pad06[2]; }; struct nvif_control_pstate_attr_v0 { __u8 version; #define NVIF_CONTROL_PSTATE_ATTR_V0_STATE_CURRENT (-1) __s8 state; /* in: index of pstate to query * out: pstate identifier */ __u8 index; /* in: index of attribute to query * out: index of next attribute, or 0 if no more */ __u8 pad03[5]; __u32 min; __u32 max; char name[32]; char unit[16]; }; struct nvif_control_pstate_user_v0 { __u8 version; #define NVIF_CONTROL_PSTATE_USER_V0_STATE_UNKNOWN (-1) #define NVIF_CONTROL_PSTATE_USER_V0_STATE_PERFMON (-2) __s8 ustate; /* in: pstate identifier */ __s8 pwrsrc; /* in: target power source */ __u8 pad03[5]; }; #endif drivers/gpu/drm/nouveau/include/nvif/if0001.h 0 → 100644 +46 −0 Original line number Diff line number Diff line #ifndef __NVIF_IF0001_H__ #define __NVIF_IF0001_H__ #define NVIF_CONTROL_PSTATE_INFO 0x00 #define NVIF_CONTROL_PSTATE_ATTR 0x01 #define NVIF_CONTROL_PSTATE_USER 0x02 struct nvif_control_pstate_info_v0 { __u8 version; __u8 count; /* out: number of power states */ #define NVIF_CONTROL_PSTATE_INFO_V0_USTATE_DISABLE (-1) #define NVIF_CONTROL_PSTATE_INFO_V0_USTATE_PERFMON (-2) __s8 ustate_ac; /* out: target pstate index */ __s8 ustate_dc; /* out: target pstate index */ __s8 pwrsrc; /* out: current power source */ #define NVIF_CONTROL_PSTATE_INFO_V0_PSTATE_UNKNOWN (-1) #define NVIF_CONTROL_PSTATE_INFO_V0_PSTATE_PERFMON (-2) __s8 pstate; /* out: current pstate index */ __u8 pad06[2]; }; struct nvif_control_pstate_attr_v0 { __u8 version; #define NVIF_CONTROL_PSTATE_ATTR_V0_STATE_CURRENT (-1) __s8 state; /* in: index of pstate to query * out: pstate identifier */ __u8 index; /* in: index of attribute to query * out: index of next attribute, or 0 if no more */ __u8 pad03[5]; __u32 min; __u32 max; char name[32]; char unit[16]; }; struct nvif_control_pstate_user_v0 { __u8 version; #define NVIF_CONTROL_PSTATE_USER_V0_STATE_UNKNOWN (-1) #define NVIF_CONTROL_PSTATE_USER_V0_STATE_PERFMON (-2) __s8 ustate; /* in: pstate identifier */ __s8 pwrsrc; /* in: target power source */ __u8 pad03[5]; }; #endif drivers/gpu/drm/nouveau/nouveau_sysfs.c +1 −0 Original line number Diff line number Diff line Loading @@ -24,6 +24,7 @@ #include <nvif/os.h> #include <nvif/class.h> #include <nvif/if0001.h> #include <nvif/ioctl.h> #include "nouveau_sysfs.h" Loading drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c +1 −0 Original line number Diff line number Diff line Loading @@ -27,6 +27,7 @@ #include <subdev/clk.h> #include <nvif/class.h> #include <nvif/if0001.h> #include <nvif/ioctl.h> #include <nvif/unpack.h> Loading Loading
drivers/gpu/drm/nouveau/include/nvif/class.h +1 −49 Original line number Diff line number Diff line Loading @@ -2,7 +2,7 @@ #define __NVIF_CLASS_H__ /* these class numbers are made up by us, and not nvidia-assigned */ #define NVIF_CLASS_CONTROL -1 #define NVIF_CLASS_CONTROL /* if0001.h */ -1 #define NVIF_CLASS_PERFMON -2 #define NVIF_CLASS_PERFDOM -3 #define NVIF_CLASS_SW_NV04 /* if0004.h */ -4 Loading Loading @@ -341,52 +341,4 @@ struct nvif_perfdom_read_v0 { __u32 clk; __u8 pad04[4]; }; /******************************************************************************* * device control ******************************************************************************/ #define NVIF_CONTROL_PSTATE_INFO 0x00 #define NVIF_CONTROL_PSTATE_ATTR 0x01 #define NVIF_CONTROL_PSTATE_USER 0x02 struct nvif_control_pstate_info_v0 { __u8 version; __u8 count; /* out: number of power states */ #define NVIF_CONTROL_PSTATE_INFO_V0_USTATE_DISABLE (-1) #define NVIF_CONTROL_PSTATE_INFO_V0_USTATE_PERFMON (-2) __s8 ustate_ac; /* out: target pstate index */ __s8 ustate_dc; /* out: target pstate index */ __s8 pwrsrc; /* out: current power source */ #define NVIF_CONTROL_PSTATE_INFO_V0_PSTATE_UNKNOWN (-1) #define NVIF_CONTROL_PSTATE_INFO_V0_PSTATE_PERFMON (-2) __s8 pstate; /* out: current pstate index */ __u8 pad06[2]; }; struct nvif_control_pstate_attr_v0 { __u8 version; #define NVIF_CONTROL_PSTATE_ATTR_V0_STATE_CURRENT (-1) __s8 state; /* in: index of pstate to query * out: pstate identifier */ __u8 index; /* in: index of attribute to query * out: index of next attribute, or 0 if no more */ __u8 pad03[5]; __u32 min; __u32 max; char name[32]; char unit[16]; }; struct nvif_control_pstate_user_v0 { __u8 version; #define NVIF_CONTROL_PSTATE_USER_V0_STATE_UNKNOWN (-1) #define NVIF_CONTROL_PSTATE_USER_V0_STATE_PERFMON (-2) __s8 ustate; /* in: pstate identifier */ __s8 pwrsrc; /* in: target power source */ __u8 pad03[5]; }; #endif
drivers/gpu/drm/nouveau/include/nvif/if0001.h 0 → 100644 +46 −0 Original line number Diff line number Diff line #ifndef __NVIF_IF0001_H__ #define __NVIF_IF0001_H__ #define NVIF_CONTROL_PSTATE_INFO 0x00 #define NVIF_CONTROL_PSTATE_ATTR 0x01 #define NVIF_CONTROL_PSTATE_USER 0x02 struct nvif_control_pstate_info_v0 { __u8 version; __u8 count; /* out: number of power states */ #define NVIF_CONTROL_PSTATE_INFO_V0_USTATE_DISABLE (-1) #define NVIF_CONTROL_PSTATE_INFO_V0_USTATE_PERFMON (-2) __s8 ustate_ac; /* out: target pstate index */ __s8 ustate_dc; /* out: target pstate index */ __s8 pwrsrc; /* out: current power source */ #define NVIF_CONTROL_PSTATE_INFO_V0_PSTATE_UNKNOWN (-1) #define NVIF_CONTROL_PSTATE_INFO_V0_PSTATE_PERFMON (-2) __s8 pstate; /* out: current pstate index */ __u8 pad06[2]; }; struct nvif_control_pstate_attr_v0 { __u8 version; #define NVIF_CONTROL_PSTATE_ATTR_V0_STATE_CURRENT (-1) __s8 state; /* in: index of pstate to query * out: pstate identifier */ __u8 index; /* in: index of attribute to query * out: index of next attribute, or 0 if no more */ __u8 pad03[5]; __u32 min; __u32 max; char name[32]; char unit[16]; }; struct nvif_control_pstate_user_v0 { __u8 version; #define NVIF_CONTROL_PSTATE_USER_V0_STATE_UNKNOWN (-1) #define NVIF_CONTROL_PSTATE_USER_V0_STATE_PERFMON (-2) __s8 ustate; /* in: pstate identifier */ __s8 pwrsrc; /* in: target power source */ __u8 pad03[5]; }; #endif
drivers/gpu/drm/nouveau/nouveau_sysfs.c +1 −0 Original line number Diff line number Diff line Loading @@ -24,6 +24,7 @@ #include <nvif/os.h> #include <nvif/class.h> #include <nvif/if0001.h> #include <nvif/ioctl.h> #include "nouveau_sysfs.h" Loading
drivers/gpu/drm/nouveau/nvkm/engine/device/ctrl.c +1 −0 Original line number Diff line number Diff line Loading @@ -27,6 +27,7 @@ #include <subdev/clk.h> #include <nvif/class.h> #include <nvif/if0001.h> #include <nvif/ioctl.h> #include <nvif/unpack.h> Loading