Commit 633e5e93 authored by Julien Thierry's avatar Julien Thierry Committed by Will Deacon
Browse files

arm64: Move aarch32 condition check functions 



The functions to check condition flags for aarch32 execution is only
used to emulate aarch32 instructions. Move them from the instruction
encoding/decoding code to the trap handling files.

Signed-off-by: default avatarJulien Thierry <jthierry@redhat.com>
Link: https://lore.kernel.org/r/20210303170536.1838032-3-jthierry@redhat.com


[will: leave aarch32_opcode_cond_checks where it is]
Signed-off-by: default avatarWill Deacon <will@kernel.org>

Signed-off-by: default avatarWill Deacon <will@kernel.org>
parent 5f154c4e

arch/arm64/include/asm/insn.h

+1 −0
Original line number Diff line number Diff line
@@ -502,6 +502,7 @@ u32 aarch32_insn_mcr_extract_crm(u32 insn); 


typedef bool (pstate_check_t)(unsigned long);

extern pstate_check_t * const aarch32_opcode_cond_checks[16];



#endif /* __ASSEMBLY__ */



#endif	/* __ASM_INSN_H */

arch/arm64/kernel/insn.c

+0 −98
Original line number Diff line number Diff line
@@ -1289,104 +1289,6 @@ u32 aarch32_insn_mcr_extract_crm(u32 insn) 
	return insn & CRM_MASK;

}



static bool __kprobes __check_eq(unsigned long pstate)

{

	return (pstate & PSR_Z_BIT) != 0;

}



static bool __kprobes __check_ne(unsigned long pstate)

{

	return (pstate & PSR_Z_BIT) == 0;

}



static bool __kprobes __check_cs(unsigned long pstate)

{

	return (pstate & PSR_C_BIT) != 0;

}



static bool __kprobes __check_cc(unsigned long pstate)

{

	return (pstate & PSR_C_BIT) == 0;

}



static bool __kprobes __check_mi(unsigned long pstate)

{

	return (pstate & PSR_N_BIT) != 0;

}



static bool __kprobes __check_pl(unsigned long pstate)

{

	return (pstate & PSR_N_BIT) == 0;

}



static bool __kprobes __check_vs(unsigned long pstate)

{

	return (pstate & PSR_V_BIT) != 0;

}



static bool __kprobes __check_vc(unsigned long pstate)

{

	return (pstate & PSR_V_BIT) == 0;

}



static bool __kprobes __check_hi(unsigned long pstate)

{

	pstate &= ~(pstate >> 1);	/* PSR_C_BIT &= ~PSR_Z_BIT */

	return (pstate & PSR_C_BIT) != 0;

}



static bool __kprobes __check_ls(unsigned long pstate)

{

	pstate &= ~(pstate >> 1);	/* PSR_C_BIT &= ~PSR_Z_BIT */

	return (pstate & PSR_C_BIT) == 0;

}



static bool __kprobes __check_ge(unsigned long pstate)

{

	pstate ^= (pstate << 3);	/* PSR_N_BIT ^= PSR_V_BIT */

	return (pstate & PSR_N_BIT) == 0;

}



static bool __kprobes __check_lt(unsigned long pstate)

{

	pstate ^= (pstate << 3);	/* PSR_N_BIT ^= PSR_V_BIT */

	return (pstate & PSR_N_BIT) != 0;

}



static bool __kprobes __check_gt(unsigned long pstate)

{

	/*PSR_N_BIT ^= PSR_V_BIT */

	unsigned long temp = pstate ^ (pstate << 3);



	temp |= (pstate << 1);	/*PSR_N_BIT |= PSR_Z_BIT */

	return (temp & PSR_N_BIT) == 0;

}



static bool __kprobes __check_le(unsigned long pstate)

{

	/*PSR_N_BIT ^= PSR_V_BIT */

	unsigned long temp = pstate ^ (pstate << 3);



	temp |= (pstate << 1);	/*PSR_N_BIT |= PSR_Z_BIT */

	return (temp & PSR_N_BIT) != 0;

}



static bool __kprobes __check_al(unsigned long pstate)

{

	return true;

}



/*

 * Note that the ARMv8 ARM calls condition code 0b1111 "nv", but states that

 * it behaves identically to 0b1110 ("al").

 */

pstate_check_t * const aarch32_opcode_cond_checks[16] = {

	__check_eq, __check_ne, __check_cs, __check_cc,

	__check_mi, __check_pl, __check_vs, __check_vc,

	__check_hi, __check_ls, __check_ge, __check_lt,

	__check_gt, __check_le, __check_al, __check_al

};



static bool range_of_ones(u64 val)

{

	/* Doesn't handle full ones or full zeroes */

arch/arm64/kernel/probes/simulate-insn.c

+1 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ 
#include <linux/kprobes.h>



#include <asm/ptrace.h>

#include <asm/traps.h>



#include "simulate-insn.h"

arch/arm64/kernel/traps.c

+98 −1
Original line number Diff line number Diff line
@@ -36,7 +36,6 @@ 
#include <asm/esr.h>

#include <asm/exception.h>

#include <asm/extable.h>

#include <asm/insn.h>

#include <asm/kprobes.h>

#include <asm/traps.h>

#include <asm/smp.h>
@@ -45,6 +44,104 @@ 
#include <asm/system_misc.h>

#include <asm/sysreg.h>



static bool __kprobes __check_eq(unsigned long pstate)

{

	return (pstate & PSR_Z_BIT) != 0;

}



static bool __kprobes __check_ne(unsigned long pstate)

{

	return (pstate & PSR_Z_BIT) == 0;

}



static bool __kprobes __check_cs(unsigned long pstate)

{

	return (pstate & PSR_C_BIT) != 0;

}



static bool __kprobes __check_cc(unsigned long pstate)

{

	return (pstate & PSR_C_BIT) == 0;

}



static bool __kprobes __check_mi(unsigned long pstate)

{

	return (pstate & PSR_N_BIT) != 0;

}



static bool __kprobes __check_pl(unsigned long pstate)

{

	return (pstate & PSR_N_BIT) == 0;

}



static bool __kprobes __check_vs(unsigned long pstate)

{

	return (pstate & PSR_V_BIT) != 0;

}



static bool __kprobes __check_vc(unsigned long pstate)

{

	return (pstate & PSR_V_BIT) == 0;

}



static bool __kprobes __check_hi(unsigned long pstate)

{

	pstate &= ~(pstate >> 1);	/* PSR_C_BIT &= ~PSR_Z_BIT */

	return (pstate & PSR_C_BIT) != 0;

}



static bool __kprobes __check_ls(unsigned long pstate)

{

	pstate &= ~(pstate >> 1);	/* PSR_C_BIT &= ~PSR_Z_BIT */

	return (pstate & PSR_C_BIT) == 0;

}



static bool __kprobes __check_ge(unsigned long pstate)

{

	pstate ^= (pstate << 3);	/* PSR_N_BIT ^= PSR_V_BIT */

	return (pstate & PSR_N_BIT) == 0;

}



static bool __kprobes __check_lt(unsigned long pstate)

{

	pstate ^= (pstate << 3);	/* PSR_N_BIT ^= PSR_V_BIT */

	return (pstate & PSR_N_BIT) != 0;

}



static bool __kprobes __check_gt(unsigned long pstate)

{

	/*PSR_N_BIT ^= PSR_V_BIT */

	unsigned long temp = pstate ^ (pstate << 3);



	temp |= (pstate << 1);	/*PSR_N_BIT |= PSR_Z_BIT */

	return (temp & PSR_N_BIT) == 0;

}



static bool __kprobes __check_le(unsigned long pstate)

{

	/*PSR_N_BIT ^= PSR_V_BIT */

	unsigned long temp = pstate ^ (pstate << 3);



	temp |= (pstate << 1);	/*PSR_N_BIT |= PSR_Z_BIT */

	return (temp & PSR_N_BIT) != 0;

}



static bool __kprobes __check_al(unsigned long pstate)

{

	return true;

}



/*

 * Note that the ARMv8 ARM calls condition code 0b1111 "nv", but states that

 * it behaves identically to 0b1110 ("al").

 */

pstate_check_t * const aarch32_opcode_cond_checks[16] = {

	__check_eq, __check_ne, __check_cs, __check_cc,

	__check_mi, __check_pl, __check_vs, __check_vc,

	__check_hi, __check_ls, __check_ge, __check_lt,

	__check_gt, __check_le, __check_al, __check_al

};



static const char *handler[] = {

	"Synchronous Abort",

	"IRQ",