Commit 622469c8 authored by Alex Deucher's avatar Alex Deucher
Browse files

drm/amdgpu/discovery: add a function to parse the vcn info table 



To get the codec disable fuse mask.

Acked-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent f716113a

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.c

+48 −0
Original line number Diff line number Diff line
@@ -1396,6 +1396,54 @@ int amdgpu_discovery_get_mall_info(struct amdgpu_device *adev) 
	return 0;

}



union vcn_info {

	struct vcn_info_v1_0 v1;

};



int amdgpu_discovery_get_vcn_info(struct amdgpu_device *adev)

{

	struct binary_header *bhdr;

	union vcn_info *vcn_info;

	u16 offset;

	int v;



	if (!adev->mman.discovery_bin) {

		DRM_ERROR("ip discovery uninitialized\n");

		return -EINVAL;

	}



	if (adev->vcn.num_vcn_inst > VCN_INFO_TABLE_MAX_NUM_INSTANCES) {

		dev_err(adev->dev, "invalid vcn instances\n");

		return -EINVAL;

	}



	bhdr = (struct binary_header *)adev->mman.discovery_bin;

	offset = le16_to_cpu(bhdr->table_list[VCN_INFO].offset);



	if (!offset) {

		dev_err(adev->dev, "invalid vcn table offset\n");

		return -EINVAL;

	}



	vcn_info = (union vcn_info *)(adev->mman.discovery_bin + offset);



	switch (le16_to_cpu(vcn_info->v1.header.version_major)) {

	case 1:

		for (v = 0; v < adev->vcn.num_vcn_inst; v++) {

			adev->vcn.vcn_codec_disable_mask[v] =

				le32_to_cpu(vcn_info->v1.instance_info[v].fuse_data.all_bits);

		}

		break;

	default:

		dev_err(adev->dev,

			"Unhandled VCN info table %d.%d\n",

			le16_to_cpu(vcn_info->v1.header.version_major),

			le16_to_cpu(vcn_info->v1.header.version_minor));

		return -EINVAL;

	}

	return 0;

}



static int amdgpu_discovery_set_common_ip_blocks(struct amdgpu_device *adev)

{

	/* what IP to use for this? */

drivers/gpu/drm/amd/amdgpu/amdgpu_discovery.h

+1 −0
Original line number Diff line number Diff line
@@ -35,6 +35,7 @@ int amdgpu_discovery_get_ip_version(struct amdgpu_device *adev, int hw_id, int n 


int amdgpu_discovery_get_gfx_info(struct amdgpu_device *adev);

int amdgpu_discovery_get_mall_info(struct amdgpu_device *adev);

int amdgpu_discovery_get_vcn_info(struct amdgpu_device *adev);

int amdgpu_discovery_set_ip_blocks(struct amdgpu_device *adev);



#endif /* __AMDGPU_DISCOVERY__ */

drivers/gpu/drm/amd/amdgpu/amdgpu_vcn.h

+6 −0
Original line number Diff line number Diff line
@@ -166,6 +166,11 @@ 
#define AMDGPU_VCN_IB_FLAG_DECODE_BUFFER	0x00000001

#define AMDGPU_VCN_CMD_FLAG_MSG_BUFFER		0x00000001



#define VCN_CODEC_DISABLE_MASK_AV1  (1 << 0)

#define VCN_CODEC_DISABLE_MASK_VP9  (1 << 1)

#define VCN_CODEC_DISABLE_MASK_HEVC (1 << 2)

#define VCN_CODEC_DISABLE_MASK_H264 (1 << 3)



enum fw_queue_mode {

	FW_QUEUE_RING_RESET = 1,

	FW_QUEUE_DPG_HOLD_OFF = 2,
@@ -250,6 +255,7 @@ struct amdgpu_vcn { 
	uint8_t	num_vcn_inst;

	struct amdgpu_vcn_inst	 inst[AMDGPU_MAX_VCN_INSTANCES];

	uint8_t			 vcn_config[AMDGPU_MAX_VCN_INSTANCES];

	uint32_t		 vcn_codec_disable_mask[AMDGPU_MAX_VCN_INSTANCES];

	struct amdgpu_vcn_reg	 internal;

	struct mutex		 vcn_pg_lock;

	struct mutex		vcn1_jpeg1_workaround;