Commit 5ffb5267 authored by Michael Strauss's avatar Michael Strauss Committed by Alex Deucher
Browse files

drm/amd/display: Set i2c memory to light sleep during hw init 



[WHY]
i2c memory doesn't get set to light sleep on hw init as intended

[HOW]
Set i2c to light sleep after reg gets zeroed, ensuring memory power
control doesn't get disabled for any other DIO memory

Reviewed-by: default avatarHaonan Wang <Haonan.Wang2@amd.com>
Tested-by: default avatarDaniel Wheeler <daniel.wheeler@amd.com>
Acked-by: default avatarAgustin Gutierrez <agustin.gutierrez@amd.com>
Signed-off-by: default avatarMichael Strauss <michael.strauss@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 98643044

drivers/gpu/drm/amd/display/dc/dce/dce_hwseq.h

+2 −1
Original line number Diff line number Diff line
@@ -1151,7 +1151,8 @@ struct dce_hwseq_registers { 
	type DOMAIN_POWER_GATE;\

	type DOMAIN_PGFSM_PWR_STATUS;\

	type HPO_HDMISTREAMCLK_G_GATE_DIS;\

	type DISABLE_HOSTVM_FORCE_ALLOW_PSTATE;

	type DISABLE_HOSTVM_FORCE_ALLOW_PSTATE;\

	type I2C_LIGHT_SLEEP_FORCE;



struct dce_hwseq_shift {

	HWSEQ_REG_FIELD_LIST(uint8_t)

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_hwseq.c

+5 −0
Original line number Diff line number Diff line
@@ -50,6 +50,7 @@ 
#include "dcn10/dcn10_hw_sequencer.h"

#include "inc/link_enc_cfg.h"

#include "dcn30/dcn30_vpg.h"

#include "dce/dce_i2c_hw.h"



#define DC_LOGGER_INIT(logger)
@@ -259,6 +260,10 @@ void dcn31_init_hw(struct dc *dc) 
	/* power AFMT HDMI memory TODO: may move to dis/en output save power*/

	REG_WRITE(DIO_MEM_PWR_CTRL, 0);



	// Set i2c to light sleep until engine is setup

	if (dc->debug.enable_mem_low_power.bits.i2c)

		REG_UPDATE(DIO_MEM_PWR_CTRL, I2C_LIGHT_SLEEP_FORCE, 1);



	if (!dc->debug.disable_clock_gate) {

		/* enable all DCN clock gating */

		REG_WRITE(DCCG_GATE_DISABLE_CNTL, 0);

drivers/gpu/drm/amd/display/dc/dcn31/dcn31_resource.c

+2 −1
Original line number Diff line number Diff line
@@ -899,7 +899,8 @@ static const struct dce_hwseq_registers hwseq_reg = { 
	HWS_SF(, DMU_MEM_PWR_CNTL, DMCU_ERAM_MEM_PWR_FORCE, mask_sh), \

	HWS_SF(, ODM_MEM_PWR_CTRL3, ODM_MEM_UNASSIGNED_PWR_MODE, mask_sh), \

	HWS_SF(, ODM_MEM_PWR_CTRL3, ODM_MEM_VBLANK_PWR_MODE, mask_sh), \

	HWS_SF(, MMHUBBUB_MEM_PWR_CNTL, VGA_MEM_PWR_FORCE, mask_sh)

	HWS_SF(, MMHUBBUB_MEM_PWR_CNTL, VGA_MEM_PWR_FORCE, mask_sh), \

	HWS_SF(, DIO_MEM_PWR_CTRL, I2C_LIGHT_SLEEP_FORCE, mask_sh)



static const struct dce_hwseq_shift hwseq_shift = {

		HWSEQ_DCN31_MASK_SH_LIST(__SHIFT)