Commit 5fb4df28 authored by Lubomir Rintel's avatar Lubomir Rintel Committed by Arnd Bergmann
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ARM: dts: mmp3: Extend the MPMU reg range



The ACGR register is at the offset of 0x1024, beyond the 4k originally
assigned to the MPMU range.

Signed-off-by: default avatarLubomir Rintel <lkundrak@v3.sk>
Link: https://lore.kernel.org/r/20210121034130.1381872-7-lkundrak@v3.sk

'
Signed-off-by: default avatarArnd Bergmann <arnd@arndb.de>
parent 1130466a
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+1 −1
Original line number Diff line number Diff line
@@ -567,7 +567,7 @@ l2: cache-controller@d0020000 {

		soc_clocks: clocks@d4050000 {
			compatible = "marvell,mmp3-clock";
			reg = <0xd4050000 0x1000>,
			reg = <0xd4050000 0x2000>,
			      <0xd4282800 0x400>,
			      <0xd4015000 0x1000>;
			reg-names = "mpmu", "apmu", "apbc";