Loading arch/x86/kernel/apic_64.c +2 −0 Original line number Diff line number Diff line Loading @@ -41,6 +41,8 @@ #include <asm/timex.h> #include <asm/apic.h> #include <mach_ipi.h> int disable_apic_timer __cpuinitdata; static int apic_calibrate_pmtmr __initdata; int disable_apic; Loading arch/x86/kernel/crash.c +0 −4 Original line number Diff line number Diff line Loading @@ -26,11 +26,7 @@ #include <linux/kdebug.h> #include <asm/smp.h> #ifdef CONFIG_X86_32 #include <mach_ipi.h> #else #include <asm/mach_apic.h> #endif /* This keeps a track of which one is crashing cpu. */ static int crashing_cpu; Loading arch/x86/kernel/io_apic_64.c +2 −0 Original line number Diff line number Diff line Loading @@ -50,6 +50,8 @@ #include <asm/msidef.h> #include <asm/hypertransport.h> #include <mach_ipi.h> struct irq_cfg { cpumask_t domain; cpumask_t old_domain; Loading arch/x86/kernel/smp.c +1 −5 Original line number Diff line number Diff line Loading @@ -26,12 +26,8 @@ #include <asm/tlbflush.h> #include <asm/mmu_context.h> #include <asm/proto.h> #ifdef CONFIG_X86_32 #include <mach_apic.h> #include <mach_ipi.h> #else #include <asm/mach_apic.h> #endif #include <mach_apic.h> /* * Some notes on x86 processor bugs affecting SMP operation: * Loading arch/x86/kernel/tlb_64.c +2 −1 Original line number Diff line number Diff line Loading @@ -11,11 +11,12 @@ #include <asm/mtrr.h> #include <asm/pgalloc.h> #include <asm/tlbflush.h> #include <asm/mach_apic.h> #include <asm/mmu_context.h> #include <asm/proto.h> #include <asm/apicdef.h> #include <asm/idle.h> #include <mach_ipi.h> /* * Smarter SMP flushing macros. * c/o Linus Torvalds. Loading Loading
arch/x86/kernel/apic_64.c +2 −0 Original line number Diff line number Diff line Loading @@ -41,6 +41,8 @@ #include <asm/timex.h> #include <asm/apic.h> #include <mach_ipi.h> int disable_apic_timer __cpuinitdata; static int apic_calibrate_pmtmr __initdata; int disable_apic; Loading
arch/x86/kernel/crash.c +0 −4 Original line number Diff line number Diff line Loading @@ -26,11 +26,7 @@ #include <linux/kdebug.h> #include <asm/smp.h> #ifdef CONFIG_X86_32 #include <mach_ipi.h> #else #include <asm/mach_apic.h> #endif /* This keeps a track of which one is crashing cpu. */ static int crashing_cpu; Loading
arch/x86/kernel/io_apic_64.c +2 −0 Original line number Diff line number Diff line Loading @@ -50,6 +50,8 @@ #include <asm/msidef.h> #include <asm/hypertransport.h> #include <mach_ipi.h> struct irq_cfg { cpumask_t domain; cpumask_t old_domain; Loading
arch/x86/kernel/smp.c +1 −5 Original line number Diff line number Diff line Loading @@ -26,12 +26,8 @@ #include <asm/tlbflush.h> #include <asm/mmu_context.h> #include <asm/proto.h> #ifdef CONFIG_X86_32 #include <mach_apic.h> #include <mach_ipi.h> #else #include <asm/mach_apic.h> #endif #include <mach_apic.h> /* * Some notes on x86 processor bugs affecting SMP operation: * Loading
arch/x86/kernel/tlb_64.c +2 −1 Original line number Diff line number Diff line Loading @@ -11,11 +11,12 @@ #include <asm/mtrr.h> #include <asm/pgalloc.h> #include <asm/tlbflush.h> #include <asm/mach_apic.h> #include <asm/mmu_context.h> #include <asm/proto.h> #include <asm/apicdef.h> #include <asm/idle.h> #include <mach_ipi.h> /* * Smarter SMP flushing macros. * c/o Linus Torvalds. Loading