Commit 5a7a1eeb authored by Hersen Wu's avatar Hersen Wu Committed by Alex Deucher
Browse files

drm/amd/display: set HBR3 and TPS4 capable flags 



Signed-off-by: default avatarHersen Wu <hersenxs.wu@amd.com>
Reviewed-by: default avatarZeyu Fan <Zeyu.Fan@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent aff20230

drivers/gpu/drm/amd/display/dc/dce/dce_link_encoder.c

+10 −0
Original line number Diff line number Diff line
@@ -1068,9 +1068,19 @@ bool dce110_link_encoder_construct( 
			&bp_cap_info))

		enc110->base.features.flags.bits.IS_HBR2_CAPABLE =

				bp_cap_info.DP_HBR2_CAP;

		enc110->base.features.flags.bits.IS_HBR3_CAPABLE =

				bp_cap_info.DP_HBR3_EN;



	}



	/* TODO: check PPLIB maxPhyClockInKHz <= 540000, if yes,

	 * IS_HBR3_CAPABLE = 0.

	 */



	/* test pattern 3 support */

	enc110->base.features.flags.bits.IS_TPS3_CAPABLE = true;

	/* test pattern 4 support */

	enc110->base.features.flags.bits.IS_TPS4_CAPABLE = true;



	enc110->base.features.flags.bits.IS_Y_ONLY_CAPABLE = false;

	/*