Commit 58dd4736 authored by Zhen Lei's avatar Zhen Lei Committed by Wei Xu
Browse files

arm64: dts: hisilicon: list all clocks required by pl011.yaml 



The arm,pl011 binding need to specify two clocks: "uartclk", "apb_pclk".
But only "apb_pclk" is specified now. Because the driver preferentially
matches the first clock. Otherwise, it matches the second clock instead
of both clocks. So both of them use the same clock don't change the
function.

Signed-off-by: default avatarZhen Lei <thunder.leizhen@huawei.com>
Signed-off-by: default avatarWei Xu <xuwei5@hisilicon.com>
parent c85731ab

arch/arm64/boot/dts/hisilicon/hi3798cv200.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -216,8 +216,8 @@ uart0: serial@8b00000 { 
			compatible = "arm,pl011", "arm,primecell";

			reg = <0x8b00000 0x1000>;

			interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&sysctrl HISTB_UART0_CLK>;

			clock-names = "apb_pclk";

			clocks = <&sysctrl HISTB_UART0_CLK>, <&sysctrl HISTB_UART0_CLK>;

			clock-names = "uartclk", "apb_pclk";

			status = "disabled";

		};
@@ -225,8 +225,8 @@ uart2: serial@8b02000 { 
			compatible = "arm,pl011", "arm,primecell";

			reg = <0x8b02000 0x1000>;

			interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;

			clocks = <&crg HISTB_UART2_CLK>;

			clock-names = "apb_pclk";

			clocks = <&crg HISTB_UART2_CLK>, <&crg HISTB_UART2_CLK>;

			clock-names = "uartclk", "apb_pclk";

			status = "disabled";

		};