Commit 58bb0e63 authored by Andrew Jiang's avatar Andrew Jiang Committed by Alex Deucher
Browse files

drm/amd/display: Correct timings in build scaling params 



A previous patch set the addressable timing as active + border,
when in fact, the VESA standard specifies active as equal to
addressable + border.

This patch makes the fix more correct and in line with the standard.

Signed-off-by: default avatarAndrew Jiang <Andrew.Jiang@amd.com>
Reviewed-by: default avatarAndrew Jiang <Andrew.Jiang@amd.com>
Reviewed-by: default avatarTony Cheng <Tony.Cheng@amd.com>
Acked-by: default avatarHarry Wentland <Harry.Wentland@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 9a5bcd47

drivers/gpu/drm/amd/display/dc/core/dc_resource.c

+3 −14
Original line number Diff line number Diff line
@@ -850,22 +850,11 @@ bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx) 
	 */

	pipe_ctx->plane_res.scl_data.lb_params.depth = LB_PIXEL_DEPTH_30BPP;



	/**

	 * KMD sends us h and v_addressable without the borders, which causes us sometimes to draw

	 * the blank region on-screen. Correct for this by adding the borders back to their

	 * respective addressable values, and by shifting recout.

	 */

	timing->h_addressable += timing->h_border_left + timing->h_border_right;

	timing->v_addressable += timing->v_border_top + timing->v_border_bottom;

	pipe_ctx->plane_res.scl_data.recout.y += timing->v_border_top;

	pipe_ctx->plane_res.scl_data.recout.x += timing->h_border_left;

	timing->v_border_top = 0;

	timing->v_border_bottom = 0;

	timing->h_border_left = 0;

	timing->h_border_right = 0;

	pipe_ctx->plane_res.scl_data.recout.y += timing->v_border_top;



	pipe_ctx->plane_res.scl_data.h_active = timing->h_addressable;

	pipe_ctx->plane_res.scl_data.v_active = timing->v_addressable;

	pipe_ctx->plane_res.scl_data.h_active = timing->h_addressable + timing->h_border_left + timing->h_border_right;

	pipe_ctx->plane_res.scl_data.v_active = timing->v_addressable + timing->v_border_top + timing->v_border_bottom;



	/* Taps calculations */

	if (pipe_ctx->plane_res.xfm != NULL)