Commit 557ed5f0 authored by Pradeep P V K's avatar Pradeep P V K Committed by Ulf Hansson
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dt-bindings: mmc: sdhci-msm: Add interconnect BW scaling strings



Add interconnect bandwidth scaling supported strings for qcom-sdhci
controller.

Signed-off-by: default avatarPradeep P V K <ppvk@codeaurora.org>
Acked-by: default avatarRob Herring <robh@kernel.org>
Reviewed-by: default avatarBjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/1591691846-7578-3-git-send-email-ppvk@codeaurora.org


Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent b4fc8278
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+18 −0
Original line number Diff line number Diff line
@@ -54,6 +54,21 @@ Required properties:
- qcom,dll-config: Chipset and Platform specific value. Use this field to
	specify the DLL_CONFIG register value as per Hardware Programming Guide.

Optional Properties:
* Following bus parameters are required for interconnect bandwidth scaling:
- interconnects: Pairs of phandles and interconnect provider specifier
		 to denote the edge source and destination ports of
		 the interconnect path.

- interconnect-names: For sdhc, we have two main paths.
		1. Data path : sdhc to ddr
		2. Config path : cpu to sdhc
		For Data interconnect path the name supposed to be
		is "sdhc-ddr" and for config interconnect path it is
		"cpu-sdhc".
		Please refer to Documentation/devicetree/bindings/
		interconnect/ for more details.

Example:

	sdhc_1: sdhci@f9824900 {
@@ -71,6 +86,9 @@ Example:

		clocks = <&gcc GCC_SDCC1_APPS_CLK>, <&gcc GCC_SDCC1_AHB_CLK>;
		clock-names = "core", "iface";
		interconnects = <&qnoc MASTER_SDCC_ID &qnoc SLAVE_DDR_ID>,
				<&qnoc MASTER_CPU_ID &qnoc SLAVE_SDCC_ID>;
		interconnect-names = "sdhc-ddr","cpu-sdhc";

		qcom,dll-config = <0x000f642c>;
		qcom,ddr-config = <0x80040868>;