Loading drivers/gpu/drm/nouveau/include/nvkm/subdev/ibus.h +3 −27 Original line number Diff line number Diff line Loading @@ -2,31 +2,7 @@ #define __NVKM_IBUS_H__ #include <core/subdev.h> struct nvkm_ibus { struct nvkm_subdev subdev; }; static inline struct nvkm_ibus * nvkm_ibus(void *obj) { return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_IBUS); } #define nvkm_ibus_create(p,e,o,d) \ nvkm_subdev_create_((p), (e), (o), 0, "PIBUS", "ibus", \ sizeof(**d), (void **)d) #define nvkm_ibus_destroy(p) \ nvkm_subdev_destroy(&(p)->subdev) #define nvkm_ibus_init(p) \ nvkm_subdev_init_old(&(p)->subdev) #define nvkm_ibus_fini(p,s) \ nvkm_subdev_fini_old(&(p)->subdev, (s)) #define _nvkm_ibus_dtor _nvkm_subdev_dtor #define _nvkm_ibus_init _nvkm_subdev_init #define _nvkm_ibus_fini _nvkm_subdev_fini extern struct nvkm_oclass gf100_ibus_oclass; extern struct nvkm_oclass gk104_ibus_oclass; extern struct nvkm_oclass gk20a_ibus_oclass; int gf100_ibus_new(struct nvkm_device *, int, struct nvkm_subdev **); int gk104_ibus_new(struct nvkm_device *, int, struct nvkm_subdev **); int gk20a_ibus_new(struct nvkm_device *, int, struct nvkm_subdev **); #endif drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +21 −21 Original line number Diff line number Diff line Loading @@ -1298,7 +1298,7 @@ nvc0_chipset = { .fuse = gf100_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, // .ibus = gf100_ibus_new, .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf100_mc_new, Loading Loading @@ -1333,7 +1333,7 @@ nvc1_chipset = { .fuse = gf100_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, // .ibus = gf100_ibus_new, .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf106_mc_new, Loading Loading @@ -1367,7 +1367,7 @@ nvc3_chipset = { .fuse = gf100_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, // .ibus = gf100_ibus_new, .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf106_mc_new, Loading Loading @@ -1401,7 +1401,7 @@ nvc4_chipset = { .fuse = gf100_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, // .ibus = gf100_ibus_new, .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf100_mc_new, Loading Loading @@ -1436,7 +1436,7 @@ nvc8_chipset = { .fuse = gf100_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, // .ibus = gf100_ibus_new, .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf100_mc_new, Loading Loading @@ -1471,7 +1471,7 @@ nvce_chipset = { .fuse = gf100_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, // .ibus = gf100_ibus_new, .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf100_mc_new, Loading Loading @@ -1506,7 +1506,7 @@ nvcf_chipset = { .fuse = gf100_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, // .ibus = gf100_ibus_new, .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf106_mc_new, Loading Loading @@ -1540,7 +1540,7 @@ nvd7_chipset = { .fuse = gf100_fuse_new, .gpio = gf119_gpio_new, .i2c = gf117_i2c_new, // .ibus = gf100_ibus_new, .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf106_mc_new, Loading Loading @@ -1572,7 +1572,7 @@ nvd9_chipset = { .fuse = gf100_fuse_new, .gpio = gf119_gpio_new, .i2c = gf119_i2c_new, // .ibus = gf100_ibus_new, .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf106_mc_new, Loading Loading @@ -1606,7 +1606,7 @@ nve4_chipset = { .fuse = gf100_fuse_new, .gpio = gk104_gpio_new, .i2c = gk104_i2c_new, // .ibus = gk104_ibus_new, .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, // .ltc = gk104_ltc_new, // .mc = gf106_mc_new, Loading Loading @@ -1642,7 +1642,7 @@ nve6_chipset = { .fuse = gf100_fuse_new, .gpio = gk104_gpio_new, .i2c = gk104_i2c_new, // .ibus = gk104_ibus_new, .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, // .ltc = gk104_ltc_new, // .mc = gf106_mc_new, Loading Loading @@ -1678,7 +1678,7 @@ nve7_chipset = { .fuse = gf100_fuse_new, .gpio = gk104_gpio_new, .i2c = gk104_i2c_new, // .ibus = gk104_ibus_new, .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, // .ltc = gk104_ltc_new, // .mc = gf106_mc_new, Loading Loading @@ -1710,7 +1710,7 @@ nvea_chipset = { .clk = gk20a_clk_new, .fb = gk20a_fb_new, .fuse = gf100_fuse_new, // .ibus = gk20a_ibus_new, .ibus = gk20a_ibus_new, // .imem = gk20a_instmem_new, // .ltc = gk104_ltc_new, // .mc = gk20a_mc_new, Loading Loading @@ -1738,7 +1738,7 @@ nvf0_chipset = { .fuse = gf100_fuse_new, .gpio = gk104_gpio_new, .i2c = gk104_i2c_new, // .ibus = gk104_ibus_new, .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, // .ltc = gk104_ltc_new, // .mc = gf106_mc_new, Loading Loading @@ -1774,7 +1774,7 @@ nvf1_chipset = { .fuse = gf100_fuse_new, .gpio = gk104_gpio_new, .i2c = gf119_i2c_new, // .ibus = gk104_ibus_new, .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, // .ltc = gk104_ltc_new, // .mc = gf106_mc_new, Loading Loading @@ -1810,7 +1810,7 @@ nv106_chipset = { .fuse = gf100_fuse_new, .gpio = gk104_gpio_new, .i2c = gk104_i2c_new, // .ibus = gk104_ibus_new, .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, // .ltc = gk104_ltc_new, // .mc = gk20a_mc_new, Loading Loading @@ -1845,7 +1845,7 @@ nv108_chipset = { .fuse = gf100_fuse_new, .gpio = gk104_gpio_new, .i2c = gk104_i2c_new, // .ibus = gk104_ibus_new, .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, // .ltc = gk104_ltc_new, // .mc = gk20a_mc_new, Loading Loading @@ -1880,7 +1880,7 @@ nv117_chipset = { .fuse = gm107_fuse_new, .gpio = gk104_gpio_new, .i2c = gf119_i2c_new, // .ibus = gk104_ibus_new, .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, // .ltc = gm107_ltc_new, // .mc = gk20a_mc_new, Loading Loading @@ -1909,7 +1909,7 @@ nv124_chipset = { .fuse = gm107_fuse_new, .gpio = gk104_gpio_new, .i2c = gm204_i2c_new, // .ibus = gk104_ibus_new, .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, // .ltc = gm107_ltc_new, // .mc = gk20a_mc_new, Loading Loading @@ -1938,7 +1938,7 @@ nv126_chipset = { .fuse = gm107_fuse_new, .gpio = gk104_gpio_new, .i2c = gm204_i2c_new, // .ibus = gk104_ibus_new, .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, // .ltc = gm107_ltc_new, // .mc = gk20a_mc_new, Loading @@ -1963,7 +1963,7 @@ nv12b_chipset = { .bus = gf100_bus_new, .fb = gk20a_fb_new, .fuse = gm107_fuse_new, // .ibus = gk20a_ibus_new, .ibus = gk20a_ibus_new, // .imem = gk20a_instmem_new, // .ltc = gm107_ltc_new, // .mc = gk20a_mc_new, Loading drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c +0 −9 Original line number Diff line number Diff line Loading @@ -33,7 +33,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; Loading @@ -56,7 +55,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; Loading @@ -79,7 +77,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; Loading @@ -101,7 +98,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; Loading @@ -124,7 +120,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; Loading @@ -146,7 +141,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; Loading @@ -168,7 +162,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; Loading @@ -191,7 +184,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf110_pmu_oclass; Loading @@ -213,7 +205,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass; Loading drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c +0 −8 Original line number Diff line number Diff line Loading @@ -33,7 +33,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk104_pmu_oclass; Loading @@ -57,7 +56,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf110_pmu_oclass; Loading @@ -81,7 +79,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk104_pmu_oclass; Loading @@ -103,7 +100,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk20a_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = gk20a_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass; Loading @@ -121,7 +117,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk110_pmu_oclass; Loading @@ -145,7 +140,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk110_pmu_oclass; Loading @@ -169,7 +163,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass; Loading @@ -192,7 +185,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass; Loading drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c +0 −4 Original line number Diff line number Diff line Loading @@ -33,7 +33,6 @@ gm100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass; Loading Loading @@ -67,7 +66,6 @@ gm100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass; Loading Loading @@ -98,7 +96,6 @@ gm100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass; Loading @@ -125,7 +122,6 @@ gm100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk20a_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = gk20a_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass; Loading Loading
drivers/gpu/drm/nouveau/include/nvkm/subdev/ibus.h +3 −27 Original line number Diff line number Diff line Loading @@ -2,31 +2,7 @@ #define __NVKM_IBUS_H__ #include <core/subdev.h> struct nvkm_ibus { struct nvkm_subdev subdev; }; static inline struct nvkm_ibus * nvkm_ibus(void *obj) { return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_IBUS); } #define nvkm_ibus_create(p,e,o,d) \ nvkm_subdev_create_((p), (e), (o), 0, "PIBUS", "ibus", \ sizeof(**d), (void **)d) #define nvkm_ibus_destroy(p) \ nvkm_subdev_destroy(&(p)->subdev) #define nvkm_ibus_init(p) \ nvkm_subdev_init_old(&(p)->subdev) #define nvkm_ibus_fini(p,s) \ nvkm_subdev_fini_old(&(p)->subdev, (s)) #define _nvkm_ibus_dtor _nvkm_subdev_dtor #define _nvkm_ibus_init _nvkm_subdev_init #define _nvkm_ibus_fini _nvkm_subdev_fini extern struct nvkm_oclass gf100_ibus_oclass; extern struct nvkm_oclass gk104_ibus_oclass; extern struct nvkm_oclass gk20a_ibus_oclass; int gf100_ibus_new(struct nvkm_device *, int, struct nvkm_subdev **); int gk104_ibus_new(struct nvkm_device *, int, struct nvkm_subdev **); int gk20a_ibus_new(struct nvkm_device *, int, struct nvkm_subdev **); #endif
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c +21 −21 Original line number Diff line number Diff line Loading @@ -1298,7 +1298,7 @@ nvc0_chipset = { .fuse = gf100_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, // .ibus = gf100_ibus_new, .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf100_mc_new, Loading Loading @@ -1333,7 +1333,7 @@ nvc1_chipset = { .fuse = gf100_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, // .ibus = gf100_ibus_new, .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf106_mc_new, Loading Loading @@ -1367,7 +1367,7 @@ nvc3_chipset = { .fuse = gf100_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, // .ibus = gf100_ibus_new, .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf106_mc_new, Loading Loading @@ -1401,7 +1401,7 @@ nvc4_chipset = { .fuse = gf100_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, // .ibus = gf100_ibus_new, .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf100_mc_new, Loading Loading @@ -1436,7 +1436,7 @@ nvc8_chipset = { .fuse = gf100_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, // .ibus = gf100_ibus_new, .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf100_mc_new, Loading Loading @@ -1471,7 +1471,7 @@ nvce_chipset = { .fuse = gf100_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, // .ibus = gf100_ibus_new, .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf100_mc_new, Loading Loading @@ -1506,7 +1506,7 @@ nvcf_chipset = { .fuse = gf100_fuse_new, .gpio = g94_gpio_new, .i2c = g94_i2c_new, // .ibus = gf100_ibus_new, .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf106_mc_new, Loading Loading @@ -1540,7 +1540,7 @@ nvd7_chipset = { .fuse = gf100_fuse_new, .gpio = gf119_gpio_new, .i2c = gf117_i2c_new, // .ibus = gf100_ibus_new, .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf106_mc_new, Loading Loading @@ -1572,7 +1572,7 @@ nvd9_chipset = { .fuse = gf100_fuse_new, .gpio = gf119_gpio_new, .i2c = gf119_i2c_new, // .ibus = gf100_ibus_new, .ibus = gf100_ibus_new, // .imem = nv50_instmem_new, // .ltc = gf100_ltc_new, // .mc = gf106_mc_new, Loading Loading @@ -1606,7 +1606,7 @@ nve4_chipset = { .fuse = gf100_fuse_new, .gpio = gk104_gpio_new, .i2c = gk104_i2c_new, // .ibus = gk104_ibus_new, .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, // .ltc = gk104_ltc_new, // .mc = gf106_mc_new, Loading Loading @@ -1642,7 +1642,7 @@ nve6_chipset = { .fuse = gf100_fuse_new, .gpio = gk104_gpio_new, .i2c = gk104_i2c_new, // .ibus = gk104_ibus_new, .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, // .ltc = gk104_ltc_new, // .mc = gf106_mc_new, Loading Loading @@ -1678,7 +1678,7 @@ nve7_chipset = { .fuse = gf100_fuse_new, .gpio = gk104_gpio_new, .i2c = gk104_i2c_new, // .ibus = gk104_ibus_new, .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, // .ltc = gk104_ltc_new, // .mc = gf106_mc_new, Loading Loading @@ -1710,7 +1710,7 @@ nvea_chipset = { .clk = gk20a_clk_new, .fb = gk20a_fb_new, .fuse = gf100_fuse_new, // .ibus = gk20a_ibus_new, .ibus = gk20a_ibus_new, // .imem = gk20a_instmem_new, // .ltc = gk104_ltc_new, // .mc = gk20a_mc_new, Loading Loading @@ -1738,7 +1738,7 @@ nvf0_chipset = { .fuse = gf100_fuse_new, .gpio = gk104_gpio_new, .i2c = gk104_i2c_new, // .ibus = gk104_ibus_new, .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, // .ltc = gk104_ltc_new, // .mc = gf106_mc_new, Loading Loading @@ -1774,7 +1774,7 @@ nvf1_chipset = { .fuse = gf100_fuse_new, .gpio = gk104_gpio_new, .i2c = gf119_i2c_new, // .ibus = gk104_ibus_new, .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, // .ltc = gk104_ltc_new, // .mc = gf106_mc_new, Loading Loading @@ -1810,7 +1810,7 @@ nv106_chipset = { .fuse = gf100_fuse_new, .gpio = gk104_gpio_new, .i2c = gk104_i2c_new, // .ibus = gk104_ibus_new, .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, // .ltc = gk104_ltc_new, // .mc = gk20a_mc_new, Loading Loading @@ -1845,7 +1845,7 @@ nv108_chipset = { .fuse = gf100_fuse_new, .gpio = gk104_gpio_new, .i2c = gk104_i2c_new, // .ibus = gk104_ibus_new, .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, // .ltc = gk104_ltc_new, // .mc = gk20a_mc_new, Loading Loading @@ -1880,7 +1880,7 @@ nv117_chipset = { .fuse = gm107_fuse_new, .gpio = gk104_gpio_new, .i2c = gf119_i2c_new, // .ibus = gk104_ibus_new, .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, // .ltc = gm107_ltc_new, // .mc = gk20a_mc_new, Loading Loading @@ -1909,7 +1909,7 @@ nv124_chipset = { .fuse = gm107_fuse_new, .gpio = gk104_gpio_new, .i2c = gm204_i2c_new, // .ibus = gk104_ibus_new, .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, // .ltc = gm107_ltc_new, // .mc = gk20a_mc_new, Loading Loading @@ -1938,7 +1938,7 @@ nv126_chipset = { .fuse = gm107_fuse_new, .gpio = gk104_gpio_new, .i2c = gm204_i2c_new, // .ibus = gk104_ibus_new, .ibus = gk104_ibus_new, // .imem = nv50_instmem_new, // .ltc = gm107_ltc_new, // .mc = gk20a_mc_new, Loading @@ -1963,7 +1963,7 @@ nv12b_chipset = { .bus = gf100_bus_new, .fb = gk20a_fb_new, .fuse = gm107_fuse_new, // .ibus = gk20a_ibus_new, .ibus = gk20a_ibus_new, // .imem = gk20a_instmem_new, // .ltc = gm107_ltc_new, // .mc = gk20a_mc_new, Loading
drivers/gpu/drm/nouveau/nvkm/engine/device/gf100.c +0 −9 Original line number Diff line number Diff line Loading @@ -33,7 +33,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; Loading @@ -56,7 +55,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; Loading @@ -79,7 +77,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; Loading @@ -101,7 +98,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; Loading @@ -124,7 +120,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; Loading @@ -146,7 +141,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; Loading @@ -168,7 +162,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf100_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf100_pmu_oclass; Loading @@ -191,7 +184,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf110_pmu_oclass; Loading @@ -213,7 +205,6 @@ gf100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gf100_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gf100_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass; Loading
drivers/gpu/drm/nouveau/nvkm/engine/device/gk104.c +0 −8 Original line number Diff line number Diff line Loading @@ -33,7 +33,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk104_pmu_oclass; Loading @@ -57,7 +56,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gf110_pmu_oclass; Loading @@ -81,7 +79,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk104_pmu_oclass; Loading @@ -103,7 +100,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk20a_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = gk20a_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass; Loading @@ -121,7 +117,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk110_pmu_oclass; Loading @@ -145,7 +140,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gf106_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk110_pmu_oclass; Loading @@ -169,7 +163,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass; Loading @@ -192,7 +185,6 @@ gk104_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &nv04_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gk104_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass; Loading
drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c +0 −4 Original line number Diff line number Diff line Loading @@ -33,7 +33,6 @@ gm100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass; Loading Loading @@ -67,7 +66,6 @@ gm100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass; Loading Loading @@ -98,7 +96,6 @@ gm100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass; Loading @@ -125,7 +122,6 @@ gm100_identify(struct nvkm_device *device) device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass; device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass; device->oclass[NVDEV_SUBDEV_IBUS ] = &gk20a_ibus_oclass; device->oclass[NVDEV_SUBDEV_INSTMEM] = gk20a_instmem_oclass; device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass; device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass; Loading