Commit 53b2fe41 authored by Hawking Zhang's avatar Hawking Zhang Committed by Alex Deucher
Browse files

drm/amdgpu: enable gfx eop interrupt per gfx pipe 



Navi10 has 2 gfx pipe and need to enable gfx eop interrupt
per pipe, instead of enable eop int for all gfx pipes at one
time.

Signed-off-by: default avatarHawking Zhang <Hawking.Zhang@amd.com>
Acked-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 19191961

drivers/gpu/drm/amd/amdgpu/amdgpu.h

+2 −1
Original line number Diff line number Diff line
@@ -213,7 +213,8 @@ struct amdgpu_atif; 
struct kfd_vm_fault_info;



enum amdgpu_cp_irq {

	AMDGPU_CP_IRQ_GFX_EOP = 0,

	AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP = 0,

	AMDGPU_CP_IRQ_GFX_ME0_PIPE1_EOP,

	AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP,

	AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE1_EOP,

	AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE2_EOP,

drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c

+2 −2
Original line number Diff line number Diff line
@@ -3113,7 +3113,7 @@ static int gfx_v6_0_sw_init(void *handle) 
		ring->ring_obj = NULL;

		sprintf(ring->name, "gfx");

		r = amdgpu_ring_init(adev, ring, 1024,

				     &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_EOP);

				     &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP);

		if (r)

			return r;

	}
@@ -3348,7 +3348,7 @@ static int gfx_v6_0_set_eop_interrupt_state(struct amdgpu_device *adev, 
					    enum amdgpu_interrupt_state state)

{

	switch (type) {

	case AMDGPU_CP_IRQ_GFX_EOP:

	case AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP:

		gfx_v6_0_set_gfx_eop_interrupt_state(adev, state);

		break;

	case AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP:

drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c

+2 −2
Original line number Diff line number Diff line
@@ -4460,7 +4460,7 @@ static int gfx_v7_0_sw_init(void *handle) 
		ring->ring_obj = NULL;

		sprintf(ring->name, "gfx");

		r = amdgpu_ring_init(adev, ring, 1024,

				     &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_EOP);

				     &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP);

		if (r)

			return r;

	}
@@ -4797,7 +4797,7 @@ static int gfx_v7_0_set_eop_interrupt_state(struct amdgpu_device *adev, 
					    enum amdgpu_interrupt_state state)

{

	switch (type) {

	case AMDGPU_CP_IRQ_GFX_EOP:

	case AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP:

		gfx_v7_0_set_gfx_eop_interrupt_state(adev, state);

		break;

	case AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP:

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

+2 −2
Original line number Diff line number Diff line
@@ -2005,7 +2005,7 @@ static int gfx_v8_0_sw_init(void *handle) 
		}



		r = amdgpu_ring_init(adev, ring, 1024, &adev->gfx.eop_irq,

				     AMDGPU_CP_IRQ_GFX_EOP);

				     AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP);

		if (r)

			return r;

	}
@@ -6533,7 +6533,7 @@ static int gfx_v8_0_set_eop_interrupt_state(struct amdgpu_device *adev, 
					    enum amdgpu_interrupt_state state)

{

	switch (type) {

	case AMDGPU_CP_IRQ_GFX_EOP:

	case AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP:

		gfx_v8_0_set_gfx_eop_interrupt_state(adev, state);

		break;

	case AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP:

drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

+2 −2
Original line number Diff line number Diff line
@@ -1721,7 +1721,7 @@ static int gfx_v9_0_sw_init(void *handle) 
		ring->use_doorbell = true;

		ring->doorbell_index = adev->doorbell_index.gfx_ring0 << 1;

		r = amdgpu_ring_init(adev, ring, 1024,

				     &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_EOP);

				     &adev->gfx.eop_irq, AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP);

		if (r)

			return r;

	}
@@ -5025,7 +5025,7 @@ static int gfx_v9_0_set_eop_interrupt_state(struct amdgpu_device *adev, 
					    enum amdgpu_interrupt_state state)

{

	switch (type) {

	case AMDGPU_CP_IRQ_GFX_EOP:

	case AMDGPU_CP_IRQ_GFX_ME0_PIPE0_EOP:

		gfx_v9_0_set_gfx_eop_interrupt_state(adev, state);

		break;

	case AMDGPU_CP_IRQ_COMPUTE_MEC1_PIPE0_EOP: