Loading arch/arm/mach-s3c2412/clock.c +0 −6 Original line number Diff line number Diff line Loading @@ -93,12 +93,6 @@ static int s3c2412_upll_enable(struct clk *clk, int enable) /* clock selections */ /* CPU EXTCLK input */ static struct clk clk_ext = { .name = "extclk", .id = -1, }; static struct clk clk_erefclk = { .name = "erefclk", .id = -1, Loading arch/arm/mach-s3c2443/clock.c +1 −14 Original line number Diff line number Diff line Loading @@ -147,12 +147,6 @@ static unsigned long s3c2443_roundrate_clksrc256(struct clk *clk, /* clock selections */ /* CPU EXTCLK input */ static struct clk clk_ext = { .name = "ext", .id = -1, }; static struct clk clk_mpllref = { .name = "mpllref", .parent = &clk_xtal, Loading @@ -167,14 +161,6 @@ static struct clk clk_mpll = { }; #endif static struct clk clk_epllref; static struct clk clk_epll = { .name = "epll", .parent = &clk_epllref, .id = -1, }; static struct clk clk_i2s_ext = { .name = "i2s-ext", .id = -1, Loading Loading @@ -1072,6 +1058,7 @@ void __init s3c2443_init_clocks(int xtal) } clk_epll.rate = s3c2443_get_epll(epllcon, xtal); clk_epll.parent = &clk_epllref; clk_usb_bus.parent = &clk_usb_bus_host; /* ensure usb bus clock is within correct rate of 48MHz */ Loading arch/arm/mach-s3c6410/cpu.c +1 −0 Original line number Diff line number Diff line Loading @@ -56,6 +56,7 @@ void __init s3c6410_init_clocks(int xtal) { printk(KERN_INFO "%s: initialising clocks\n", __func__); s3c24xx_register_baseclocks(xtal); s3c64xx_register_clocks(); } void __init s3c6410_init_irq(void) Loading arch/arm/plat-s3c/clock.c +10 −0 Original line number Diff line number Diff line Loading @@ -239,6 +239,16 @@ struct clk clk_xtal = { .ctrlbit = 0, }; struct clk clk_ext = { .name = "ext", .id = -1, }; struct clk clk_epll = { .name = "epll", .id = -1, }; struct clk clk_mpll = { .name = "mpll", .id = -1, Loading arch/arm/plat-s3c/include/plat/clock.h +8 −0 Original line number Diff line number Diff line Loading @@ -45,7 +45,13 @@ extern struct clk clk_h; extern struct clk clk_p; extern struct clk clk_mpll; extern struct clk clk_upll; extern struct clk clk_epll; extern struct clk clk_xtal; extern struct clk clk_ext; /* S3C64XX specific clocks */ extern struct clk clk_27m; extern struct clk clk_48m; /* exports for arch/arm/mach-s3c2410 * Loading @@ -61,6 +67,8 @@ extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks); extern int s3c24xx_register_baseclocks(unsigned long xtal); extern void s3c64xx_register_clocks(void); extern void s3c24xx_setup_clocks(unsigned long fclk, unsigned long hclk, unsigned long pclk); Loading Loading
arch/arm/mach-s3c2412/clock.c +0 −6 Original line number Diff line number Diff line Loading @@ -93,12 +93,6 @@ static int s3c2412_upll_enable(struct clk *clk, int enable) /* clock selections */ /* CPU EXTCLK input */ static struct clk clk_ext = { .name = "extclk", .id = -1, }; static struct clk clk_erefclk = { .name = "erefclk", .id = -1, Loading
arch/arm/mach-s3c2443/clock.c +1 −14 Original line number Diff line number Diff line Loading @@ -147,12 +147,6 @@ static unsigned long s3c2443_roundrate_clksrc256(struct clk *clk, /* clock selections */ /* CPU EXTCLK input */ static struct clk clk_ext = { .name = "ext", .id = -1, }; static struct clk clk_mpllref = { .name = "mpllref", .parent = &clk_xtal, Loading @@ -167,14 +161,6 @@ static struct clk clk_mpll = { }; #endif static struct clk clk_epllref; static struct clk clk_epll = { .name = "epll", .parent = &clk_epllref, .id = -1, }; static struct clk clk_i2s_ext = { .name = "i2s-ext", .id = -1, Loading Loading @@ -1072,6 +1058,7 @@ void __init s3c2443_init_clocks(int xtal) } clk_epll.rate = s3c2443_get_epll(epllcon, xtal); clk_epll.parent = &clk_epllref; clk_usb_bus.parent = &clk_usb_bus_host; /* ensure usb bus clock is within correct rate of 48MHz */ Loading
arch/arm/mach-s3c6410/cpu.c +1 −0 Original line number Diff line number Diff line Loading @@ -56,6 +56,7 @@ void __init s3c6410_init_clocks(int xtal) { printk(KERN_INFO "%s: initialising clocks\n", __func__); s3c24xx_register_baseclocks(xtal); s3c64xx_register_clocks(); } void __init s3c6410_init_irq(void) Loading
arch/arm/plat-s3c/clock.c +10 −0 Original line number Diff line number Diff line Loading @@ -239,6 +239,16 @@ struct clk clk_xtal = { .ctrlbit = 0, }; struct clk clk_ext = { .name = "ext", .id = -1, }; struct clk clk_epll = { .name = "epll", .id = -1, }; struct clk clk_mpll = { .name = "mpll", .id = -1, Loading
arch/arm/plat-s3c/include/plat/clock.h +8 −0 Original line number Diff line number Diff line Loading @@ -45,7 +45,13 @@ extern struct clk clk_h; extern struct clk clk_p; extern struct clk clk_mpll; extern struct clk clk_upll; extern struct clk clk_epll; extern struct clk clk_xtal; extern struct clk clk_ext; /* S3C64XX specific clocks */ extern struct clk clk_27m; extern struct clk clk_48m; /* exports for arch/arm/mach-s3c2410 * Loading @@ -61,6 +67,8 @@ extern int s3c24xx_register_clocks(struct clk **clk, int nr_clks); extern int s3c24xx_register_baseclocks(unsigned long xtal); extern void s3c64xx_register_clocks(void); extern void s3c24xx_setup_clocks(unsigned long fclk, unsigned long hclk, unsigned long pclk); Loading