Loading arch/sh/include/asm/processor.h +1 −0 Original line number Diff line number Diff line Loading @@ -102,6 +102,7 @@ struct task_struct; extern struct pt_regs fake_swapper_regs; extern void cpu_init(void); extern void cpu_probe(void); /* arch/sh/kernel/process.c */ Loading arch/sh/include/asm/processor_32.h +0 −2 Original line number Diff line number Diff line Loading @@ -27,8 +27,6 @@ #define CCN_CVR 0xff000040 #define CCN_PRR 0xff000044 asmlinkage void __init sh_cpu_init(void); /* * User space process size: 2GB. * Loading arch/sh/kernel/cpu/init.c +10 −10 Original line number Diff line number Diff line Loading @@ -43,9 +43,9 @@ * peripherals (nofpu, nodsp, and so forth). */ #define onchip_setup(x) \ static int x##_disabled __initdata = !cpu_has_##x; \ static int x##_disabled __cpuinitdata = !cpu_has_##x; \ \ static int __init x##_setup(char *opts) \ static int __cpuinit x##_setup(char *opts) \ { \ x##_disabled = 1; \ return 1; \ Loading @@ -59,7 +59,7 @@ onchip_setup(dsp); #define CPUOPM 0xff2f0000 #define CPUOPM_RABD (1 << 5) static void __init speculative_execution_init(void) static void __cpuinit speculative_execution_init(void) { /* Clear RABD */ __raw_writel(__raw_readl(CPUOPM) & ~CPUOPM_RABD, CPUOPM); Loading @@ -78,7 +78,7 @@ static void __init speculative_execution_init(void) #define EXPMASK_BRDSSLP (1 << 1) #define EXPMASK_MMCAW (1 << 4) static void __init expmask_init(void) static void __cpuinit expmask_init(void) { unsigned long expmask = __raw_readl(EXPMASK); Loading Loading @@ -217,7 +217,7 @@ static void detect_cache_shape(void) l2_cache_shape = -1; /* No S-cache */ } static void __init fpu_init(void) static void __cpuinit fpu_init(void) { /* Disable the FPU */ if (fpu_disabled && (current_cpu_data.flags & CPU_HAS_FPU)) { Loading @@ -230,7 +230,7 @@ static void __init fpu_init(void) } #ifdef CONFIG_SH_DSP static void __init release_dsp(void) static void __cpuinit release_dsp(void) { unsigned long sr; Loading @@ -244,7 +244,7 @@ static void __init release_dsp(void) ); } static void __init dsp_init(void) static void __cpuinit dsp_init(void) { unsigned long sr; Loading Loading @@ -276,11 +276,11 @@ static void __init dsp_init(void) release_dsp(); } #else static inline void __init dsp_init(void) { } static inline void __cpuinit dsp_init(void) { } #endif /* CONFIG_SH_DSP */ /** * sh_cpu_init * cpu_init * * This is our initial entry point for each CPU, and is invoked on the * boot CPU prior to calling start_kernel(). For SMP, a combination of Loading @@ -295,7 +295,7 @@ static inline void __init dsp_init(void) { } * Each processor family is still responsible for doing its own probing * and cache configuration in cpu_probe(). */ asmlinkage void __init sh_cpu_init(void) asmlinkage void __cpuinit cpu_init(void) { current_thread_info()->cpu = hard_smp_processor_id(); Loading arch/sh/kernel/head_32.S +1 −1 Original line number Diff line number Diff line Loading @@ -335,7 +335,7 @@ ENTRY(stack_start) 3: .long __bss_start 4: .long _end 5: .long start_kernel 6: .long sh_cpu_init 6: .long cpu_init 7: .long init_thread_union #ifdef CONFIG_PMB Loading arch/sh/kernel/process.c +1 −1 Original line number Diff line number Diff line Loading @@ -89,7 +89,7 @@ void arch_task_cache_init(void) # define HAVE_SOFTFP 0 #endif void init_thread_xstate(void) void __cpuinit init_thread_xstate(void) { if (boot_cpu_data.flags & CPU_HAS_FPU) xstate_size = sizeof(struct sh_fpu_hard_struct); Loading Loading
arch/sh/include/asm/processor.h +1 −0 Original line number Diff line number Diff line Loading @@ -102,6 +102,7 @@ struct task_struct; extern struct pt_regs fake_swapper_regs; extern void cpu_init(void); extern void cpu_probe(void); /* arch/sh/kernel/process.c */ Loading
arch/sh/include/asm/processor_32.h +0 −2 Original line number Diff line number Diff line Loading @@ -27,8 +27,6 @@ #define CCN_CVR 0xff000040 #define CCN_PRR 0xff000044 asmlinkage void __init sh_cpu_init(void); /* * User space process size: 2GB. * Loading
arch/sh/kernel/cpu/init.c +10 −10 Original line number Diff line number Diff line Loading @@ -43,9 +43,9 @@ * peripherals (nofpu, nodsp, and so forth). */ #define onchip_setup(x) \ static int x##_disabled __initdata = !cpu_has_##x; \ static int x##_disabled __cpuinitdata = !cpu_has_##x; \ \ static int __init x##_setup(char *opts) \ static int __cpuinit x##_setup(char *opts) \ { \ x##_disabled = 1; \ return 1; \ Loading @@ -59,7 +59,7 @@ onchip_setup(dsp); #define CPUOPM 0xff2f0000 #define CPUOPM_RABD (1 << 5) static void __init speculative_execution_init(void) static void __cpuinit speculative_execution_init(void) { /* Clear RABD */ __raw_writel(__raw_readl(CPUOPM) & ~CPUOPM_RABD, CPUOPM); Loading @@ -78,7 +78,7 @@ static void __init speculative_execution_init(void) #define EXPMASK_BRDSSLP (1 << 1) #define EXPMASK_MMCAW (1 << 4) static void __init expmask_init(void) static void __cpuinit expmask_init(void) { unsigned long expmask = __raw_readl(EXPMASK); Loading Loading @@ -217,7 +217,7 @@ static void detect_cache_shape(void) l2_cache_shape = -1; /* No S-cache */ } static void __init fpu_init(void) static void __cpuinit fpu_init(void) { /* Disable the FPU */ if (fpu_disabled && (current_cpu_data.flags & CPU_HAS_FPU)) { Loading @@ -230,7 +230,7 @@ static void __init fpu_init(void) } #ifdef CONFIG_SH_DSP static void __init release_dsp(void) static void __cpuinit release_dsp(void) { unsigned long sr; Loading @@ -244,7 +244,7 @@ static void __init release_dsp(void) ); } static void __init dsp_init(void) static void __cpuinit dsp_init(void) { unsigned long sr; Loading Loading @@ -276,11 +276,11 @@ static void __init dsp_init(void) release_dsp(); } #else static inline void __init dsp_init(void) { } static inline void __cpuinit dsp_init(void) { } #endif /* CONFIG_SH_DSP */ /** * sh_cpu_init * cpu_init * * This is our initial entry point for each CPU, and is invoked on the * boot CPU prior to calling start_kernel(). For SMP, a combination of Loading @@ -295,7 +295,7 @@ static inline void __init dsp_init(void) { } * Each processor family is still responsible for doing its own probing * and cache configuration in cpu_probe(). */ asmlinkage void __init sh_cpu_init(void) asmlinkage void __cpuinit cpu_init(void) { current_thread_info()->cpu = hard_smp_processor_id(); Loading
arch/sh/kernel/head_32.S +1 −1 Original line number Diff line number Diff line Loading @@ -335,7 +335,7 @@ ENTRY(stack_start) 3: .long __bss_start 4: .long _end 5: .long start_kernel 6: .long sh_cpu_init 6: .long cpu_init 7: .long init_thread_union #ifdef CONFIG_PMB Loading
arch/sh/kernel/process.c +1 −1 Original line number Diff line number Diff line Loading @@ -89,7 +89,7 @@ void arch_task_cache_init(void) # define HAVE_SOFTFP 0 #endif void init_thread_xstate(void) void __cpuinit init_thread_xstate(void) { if (boot_cpu_data.flags & CPU_HAS_FPU) xstate_size = sizeof(struct sh_fpu_hard_struct); Loading