Commit 4a673157 authored by Michael Strauss's avatar Michael Strauss Committed by Alex Deucher
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drm/amd/display: Fix incorrect dcn1 bandwidth calculations 



[WHY]
Typos cause bandwidth calculation errors, one
of which can cause infinite loop on dcn1 with eDP

Signed-off-by: default avatarMichael Strauss <michael.strauss@amd.com>
Reviewed-by: default avatarDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: default avatarQingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 1e5d05ec

drivers/gpu/drm/amd/display/dc/calcs/dcn_calc_auto.c

+3 −3
Original line number Diff line number Diff line
@@ -805,7 +805,7 @@ void mode_support_and_system_configuration(struct dcn_bw_internal_vars *v) 


					if (v->pte_enable == dcn_bw_yes && v->dcc_enable[k] == dcn_bw_yes) {

						v->time_for_meta_pte_without_immediate_flip = dcn_bw_max3(

								v->meta_pte_bytes_frame[k] / v->prefetch_bandwidth[k],

								v->meta_pte_bytes_frame[k] / v->prefetch_bw[k],

								v->extra_latency,

								v->htotal[k] / v->pixel_clock[k] / 4.0);

					} else {
@@ -814,7 +814,7 @@ void mode_support_and_system_configuration(struct dcn_bw_internal_vars *v) 


					if (v->pte_enable == dcn_bw_yes || v->dcc_enable[k] == dcn_bw_yes) {

						v->time_for_meta_and_dpte_row_without_immediate_flip = dcn_bw_max3((

								v->meta_row_bytes[k] + v->dpte_bytes_per_row[k]) / v->prefetch_bandwidth[k],

								v->meta_row_bytes[k] + v->dpte_bytes_per_row[k]) / v->prefetch_bw[k],

								v->htotal[k] / v->pixel_clock[k] - v->time_for_meta_pte_without_immediate_flip,

								v->extra_latency);

					} else {
@@ -827,7 +827,7 @@ void mode_support_and_system_configuration(struct dcn_bw_internal_vars *v) 
					v->lines_for_meta_and_dpte_row_without_immediate_flip[k] =dcn_bw_floor2(4.0 * (v->time_for_meta_and_dpte_row_without_immediate_flip / (v->htotal[k] / v->pixel_clock[k]) + 0.125), 1.0) / 4;

					v->maximum_vstartup = v->maximum_vstartup - 1;



					if (v->lines_for_meta_pte_without_immediate_flip[k] < 8.0 && v->lines_for_meta_and_dpte_row_without_immediate_flip[k] < 16.0)

					if (v->lines_for_meta_pte_without_immediate_flip[k] < 32.0 && v->lines_for_meta_and_dpte_row_without_immediate_flip[k] < 16.0)

						break;



				} while(1);