Commit 48f6e195 authored by Sameer Pujar's avatar Sameer Pujar Committed by Thierry Reding
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arm64: tegra: Fix Tegra194 HDA {clock,reset}-names ordering



As per the HDA binding doc reorder {clock,reset}-names entries for
Tegra194. This also serves as a preparation for converting existing
binding doc to json-schema.

Signed-off-by: default avatarSameer Pujar <spujar@nvidia.com>
Signed-off-by: default avatarThierry Reding <treding@nvidia.com>
parent e061fbdf
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+6 −6
Original line number Diff line number Diff line
@@ -782,13 +782,13 @@ hda@3510000 {
			reg = <0x3510000 0x10000>;
			interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&bpmp TEGRA194_CLK_HDA>,
				 <&bpmp TEGRA194_CLK_HDA2CODEC_2X>,
				 <&bpmp TEGRA194_CLK_HDA2HDMICODEC>;
			clock-names = "hda", "hda2codec_2x", "hda2hdmi";
				 <&bpmp TEGRA194_CLK_HDA2HDMICODEC>,
				 <&bpmp TEGRA194_CLK_HDA2CODEC_2X>;
			clock-names = "hda", "hda2hdmi", "hda2codec_2x";
			resets = <&bpmp TEGRA194_RESET_HDA>,
				 <&bpmp TEGRA194_RESET_HDA2CODEC_2X>,
				 <&bpmp TEGRA194_RESET_HDA2HDMICODEC>;
			reset-names = "hda", "hda2codec_2x", "hda2hdmi";
				 <&bpmp TEGRA194_RESET_HDA2HDMICODEC>,
				 <&bpmp TEGRA194_RESET_HDA2CODEC_2X>;
			reset-names = "hda", "hda2hdmi", "hda2codec_2x";
			power-domains = <&bpmp TEGRA194_POWER_DOMAIN_DISP>;
			interconnects = <&mc TEGRA194_MEMORY_CLIENT_HDAR &emc>,
					<&mc TEGRA194_MEMORY_CLIENT_HDAW &emc>;