Commit 479afffe authored by Rex Zhu's avatar Rex Zhu Committed by Alex Deucher
Browse files

drm/amd/pp: Remove wrong code in fiji_start_smu 



HW CG feature will be enabled after hw ip initialized

Reviewed-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Signed-off-by: default avatarRex Zhu <Rex.Zhu@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent e5a4059c

drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c

+0 −10
Original line number Diff line number Diff line
@@ -302,16 +302,6 @@ static int fiji_start_smu(struct pp_hwmgr *hwmgr) 
			hwmgr->avfs_supported = false;

	}



	/* To initialize all clock gating before RLC loaded and running.*/

	amdgpu_device_ip_set_clockgating_state(hwmgr->adev,

			AMD_IP_BLOCK_TYPE_GFX, AMD_CG_STATE_GATE);

	amdgpu_device_ip_set_clockgating_state(hwmgr->adev,

			AMD_IP_BLOCK_TYPE_GMC, AMD_CG_STATE_GATE);

	amdgpu_device_ip_set_clockgating_state(hwmgr->adev,

			AMD_IP_BLOCK_TYPE_SDMA, AMD_CG_STATE_GATE);

	amdgpu_device_ip_set_clockgating_state(hwmgr->adev,

			AMD_IP_BLOCK_TYPE_COMMON, AMD_CG_STATE_GATE);



	/* Setup SoftRegsStart here for register lookup in case

	 * DummyBackEnd is used and ProcessFirmwareHeader is not executed

	 */