Commit 44222656 authored by Jouni Högander's avatar Jouni Högander
Browse files

drm/i915/psr: Modify/Fix Wa_16013835468 and prepare for Wa_14015648006 



Wa_16013835468 is a separate from Wa_14015648006 and needs to be
applied for display version 12. Fix this by removing all the
references to Wa_14015648006 and apply Wa_16013835468 according to
Bspec.

Also move workaround into separate function as a preparation for
Wa_14015648006 implementation.

Bspec: 55378

v3:
 - apply for display version 12 only
v2:
 - keep applying the wa in intel_psr_enable_source

Signed-off-by: default avatarJouni Högander <jouni.hogander@intel.com>
Reviewed-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230329150703.432072-3-jouni.hogander@intel.com
parent 19d06582

drivers/gpu/drm/i915/display/intel_psr.c

+24 −11
Original line number Diff line number Diff line
@@ -1134,6 +1134,28 @@ static u32 wa_16013835468_bit_get(struct intel_dp *intel_dp) 
	}

}



/*

 * Wa_16013835468

 */

static void wm_optimization_wa(struct intel_dp *intel_dp,

			       const struct intel_crtc_state *crtc_state)

{

	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);

	bool set_wa_bit = false;



	/* Wa_16013835468 */

	if (DISPLAY_VER(dev_priv) == 12)

		set_wa_bit |= crtc_state->hw.adjusted_mode.crtc_vblank_start !=

			crtc_state->hw.adjusted_mode.crtc_vdisplay;



	if (set_wa_bit)

		intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1,

			     0, wa_16013835468_bit_get(intel_dp));

	else

		intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1,

			     wa_16013835468_bit_get(intel_dp), 0);

}



static void intel_psr_enable_source(struct intel_dp *intel_dp,

				    const struct intel_crtc_state *crtc_state)

{
@@ -1175,15 +1197,8 @@ static void intel_psr_enable_source(struct intel_dp *intel_dp, 


	/*

	 * Wa_16013835468

	 * Wa_14015648006

	 */

	if (IS_MTL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0) ||

	    IS_DISPLAY_VER(dev_priv, 12, 13)) {

		if (crtc_state->hw.adjusted_mode.crtc_vblank_start !=

		    crtc_state->hw.adjusted_mode.crtc_vdisplay)

			intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1, 0,

				     wa_16013835468_bit_get(intel_dp));

	}

	wm_optimization_wa(intel_dp, crtc_state);



	if (intel_dp->psr.psr2_enabled) {

		if (DISPLAY_VER(dev_priv) == 9)
@@ -1359,10 +1374,8 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp) 


	/*

	 * Wa_16013835468

	 * Wa_14015648006

	 */

	if (IS_MTL_DISPLAY_STEP(dev_priv, STEP_A0, STEP_B0) ||

	    IS_DISPLAY_VER(dev_priv, 12, 13))

	if (DISPLAY_VER(dev_priv) == 12)

		intel_de_rmw(dev_priv, GEN8_CHICKEN_DCPR_1,

			     wa_16013835468_bit_get(intel_dp), 0);