Loading arch/arm/plat-omap/gpio.c +92 −0 Original line number Diff line number Diff line Loading @@ -290,6 +290,23 @@ static struct gpio_bank gpio_bank_34xx[6] = { METHOD_GPIO_24XX }, }; struct omap3_gpio_regs { u32 sysconfig; u32 irqenable1; u32 irqenable2; u32 wake_en; u32 ctrl; u32 oe; u32 leveldetect0; u32 leveldetect1; u32 risingdetect; u32 fallingdetect; u32 dataout; u32 setwkuena; u32 setdataout; }; static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS]; #endif #ifdef CONFIG_ARCH_OMAP4 Loading Loading @@ -2036,6 +2053,81 @@ void omap2_gpio_resume_after_retention(void) #endif #ifdef CONFIG_ARCH_OMAP34XX /* save the registers of bank 2-6 */ void omap_gpio_save_context(void) { int i; /* saving banks from 2-6 only since GPIO1 is in WKUP */ for (i = 1; i < gpio_bank_count; i++) { struct gpio_bank *bank = &gpio_bank[i]; gpio_context[i].sysconfig = __raw_readl(bank->base + OMAP24XX_GPIO_SYSCONFIG); gpio_context[i].irqenable1 = __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE1); gpio_context[i].irqenable2 = __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE2); gpio_context[i].wake_en = __raw_readl(bank->base + OMAP24XX_GPIO_WAKE_EN); gpio_context[i].ctrl = __raw_readl(bank->base + OMAP24XX_GPIO_CTRL); gpio_context[i].oe = __raw_readl(bank->base + OMAP24XX_GPIO_OE); gpio_context[i].leveldetect0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0); gpio_context[i].leveldetect1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); gpio_context[i].risingdetect = __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT); gpio_context[i].fallingdetect = __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT); gpio_context[i].dataout = __raw_readl(bank->base + OMAP24XX_GPIO_DATAOUT); gpio_context[i].setwkuena = __raw_readl(bank->base + OMAP24XX_GPIO_SETWKUENA); gpio_context[i].setdataout = __raw_readl(bank->base + OMAP24XX_GPIO_SETDATAOUT); } } /* restore the required registers of bank 2-6 */ void omap_gpio_restore_context(void) { int i; for (i = 1; i < gpio_bank_count; i++) { struct gpio_bank *bank = &gpio_bank[i]; __raw_writel(gpio_context[i].sysconfig, bank->base + OMAP24XX_GPIO_SYSCONFIG); __raw_writel(gpio_context[i].irqenable1, bank->base + OMAP24XX_GPIO_IRQENABLE1); __raw_writel(gpio_context[i].irqenable2, bank->base + OMAP24XX_GPIO_IRQENABLE2); __raw_writel(gpio_context[i].wake_en, bank->base + OMAP24XX_GPIO_WAKE_EN); __raw_writel(gpio_context[i].ctrl, bank->base + OMAP24XX_GPIO_CTRL); __raw_writel(gpio_context[i].oe, bank->base + OMAP24XX_GPIO_OE); __raw_writel(gpio_context[i].leveldetect0, bank->base + OMAP24XX_GPIO_LEVELDETECT0); __raw_writel(gpio_context[i].leveldetect1, bank->base + OMAP24XX_GPIO_LEVELDETECT1); __raw_writel(gpio_context[i].risingdetect, bank->base + OMAP24XX_GPIO_RISINGDETECT); __raw_writel(gpio_context[i].fallingdetect, bank->base + OMAP24XX_GPIO_FALLINGDETECT); __raw_writel(gpio_context[i].dataout, bank->base + OMAP24XX_GPIO_DATAOUT); __raw_writel(gpio_context[i].setwkuena, bank->base + OMAP24XX_GPIO_SETWKUENA); __raw_writel(gpio_context[i].setdataout, bank->base + OMAP24XX_GPIO_SETDATAOUT); } } #endif /* * This may get called early from board specific init * for boards that have interrupts routed via FPGA. Loading arch/arm/plat-omap/include/plat/gpio.h +2 −1 Original line number Diff line number Diff line Loading @@ -76,7 +76,8 @@ extern void omap2_gpio_prepare_for_retention(void); extern void omap2_gpio_resume_after_retention(void); extern void omap_set_gpio_debounce(int gpio, int enable); extern void omap_set_gpio_debounce_time(int gpio, int enable); extern void omap_gpio_save_context(void); extern void omap_gpio_restore_context(void); /*-------------------------------------------------------------------------*/ /* Wrappers for "new style" GPIO calls, using the new infrastructure Loading Loading
arch/arm/plat-omap/gpio.c +92 −0 Original line number Diff line number Diff line Loading @@ -290,6 +290,23 @@ static struct gpio_bank gpio_bank_34xx[6] = { METHOD_GPIO_24XX }, }; struct omap3_gpio_regs { u32 sysconfig; u32 irqenable1; u32 irqenable2; u32 wake_en; u32 ctrl; u32 oe; u32 leveldetect0; u32 leveldetect1; u32 risingdetect; u32 fallingdetect; u32 dataout; u32 setwkuena; u32 setdataout; }; static struct omap3_gpio_regs gpio_context[OMAP34XX_NR_GPIOS]; #endif #ifdef CONFIG_ARCH_OMAP4 Loading Loading @@ -2036,6 +2053,81 @@ void omap2_gpio_resume_after_retention(void) #endif #ifdef CONFIG_ARCH_OMAP34XX /* save the registers of bank 2-6 */ void omap_gpio_save_context(void) { int i; /* saving banks from 2-6 only since GPIO1 is in WKUP */ for (i = 1; i < gpio_bank_count; i++) { struct gpio_bank *bank = &gpio_bank[i]; gpio_context[i].sysconfig = __raw_readl(bank->base + OMAP24XX_GPIO_SYSCONFIG); gpio_context[i].irqenable1 = __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE1); gpio_context[i].irqenable2 = __raw_readl(bank->base + OMAP24XX_GPIO_IRQENABLE2); gpio_context[i].wake_en = __raw_readl(bank->base + OMAP24XX_GPIO_WAKE_EN); gpio_context[i].ctrl = __raw_readl(bank->base + OMAP24XX_GPIO_CTRL); gpio_context[i].oe = __raw_readl(bank->base + OMAP24XX_GPIO_OE); gpio_context[i].leveldetect0 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT0); gpio_context[i].leveldetect1 = __raw_readl(bank->base + OMAP24XX_GPIO_LEVELDETECT1); gpio_context[i].risingdetect = __raw_readl(bank->base + OMAP24XX_GPIO_RISINGDETECT); gpio_context[i].fallingdetect = __raw_readl(bank->base + OMAP24XX_GPIO_FALLINGDETECT); gpio_context[i].dataout = __raw_readl(bank->base + OMAP24XX_GPIO_DATAOUT); gpio_context[i].setwkuena = __raw_readl(bank->base + OMAP24XX_GPIO_SETWKUENA); gpio_context[i].setdataout = __raw_readl(bank->base + OMAP24XX_GPIO_SETDATAOUT); } } /* restore the required registers of bank 2-6 */ void omap_gpio_restore_context(void) { int i; for (i = 1; i < gpio_bank_count; i++) { struct gpio_bank *bank = &gpio_bank[i]; __raw_writel(gpio_context[i].sysconfig, bank->base + OMAP24XX_GPIO_SYSCONFIG); __raw_writel(gpio_context[i].irqenable1, bank->base + OMAP24XX_GPIO_IRQENABLE1); __raw_writel(gpio_context[i].irqenable2, bank->base + OMAP24XX_GPIO_IRQENABLE2); __raw_writel(gpio_context[i].wake_en, bank->base + OMAP24XX_GPIO_WAKE_EN); __raw_writel(gpio_context[i].ctrl, bank->base + OMAP24XX_GPIO_CTRL); __raw_writel(gpio_context[i].oe, bank->base + OMAP24XX_GPIO_OE); __raw_writel(gpio_context[i].leveldetect0, bank->base + OMAP24XX_GPIO_LEVELDETECT0); __raw_writel(gpio_context[i].leveldetect1, bank->base + OMAP24XX_GPIO_LEVELDETECT1); __raw_writel(gpio_context[i].risingdetect, bank->base + OMAP24XX_GPIO_RISINGDETECT); __raw_writel(gpio_context[i].fallingdetect, bank->base + OMAP24XX_GPIO_FALLINGDETECT); __raw_writel(gpio_context[i].dataout, bank->base + OMAP24XX_GPIO_DATAOUT); __raw_writel(gpio_context[i].setwkuena, bank->base + OMAP24XX_GPIO_SETWKUENA); __raw_writel(gpio_context[i].setdataout, bank->base + OMAP24XX_GPIO_SETDATAOUT); } } #endif /* * This may get called early from board specific init * for boards that have interrupts routed via FPGA. Loading
arch/arm/plat-omap/include/plat/gpio.h +2 −1 Original line number Diff line number Diff line Loading @@ -76,7 +76,8 @@ extern void omap2_gpio_prepare_for_retention(void); extern void omap2_gpio_resume_after_retention(void); extern void omap_set_gpio_debounce(int gpio, int enable); extern void omap_set_gpio_debounce_time(int gpio, int enable); extern void omap_gpio_save_context(void); extern void omap_gpio_restore_context(void); /*-------------------------------------------------------------------------*/ /* Wrappers for "new style" GPIO calls, using the new infrastructure Loading